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| author | Alistair Francis <alistair.francis@wdc.com> | 2021-08-30 15:35:02 +1000 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2021-09-21 07:56:49 +1000 |
| commit | f436ecc3156dea7edce97e7c247e3667203f5c8b (patch) | |
| tree | 1ca775b95bfaa3f19cb76a7cff031ac9aa05c4e0 /configure | |
| parent | e5cc6aaeb51dd0d80e1f5a6d6a6808d6355958aa (diff) | |
| download | qemu-f436ecc3156dea7edce97e7c247e3667203f5c8b.zip qemu-f436ecc3156dea7edce97e7c247e3667203f5c8b.tar.gz qemu-f436ecc3156dea7edce97e7c247e3667203f5c8b.tar.bz2 | |
hw/intc: sifive_plic: Convert the PLIC to use RISC-V CPU GPIO lines
Instead of using riscv_cpu_update_mip() let's instead use the new RISC-V
CPU GPIO lines to set the external MIP bits.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Message-id: 0364190bfa935058a845c0fa1ecf650328840ad5.1630301632.git.alistair.francis@wdc.com
Diffstat (limited to 'configure')
0 files changed, 0 insertions, 0 deletions