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author | Fabiano Rosas <farosas@linux.ibm.com> | 2022-02-09 09:08:55 +0100 |
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committer | Cédric Le Goater <clg@kaod.org> | 2022-02-09 09:08:55 +0100 |
commit | 082d783bf02eaafa4610fbdd9fe8b1749bcf0e2d (patch) | |
tree | d410e7dfa650045e93e4ce994ac16626f5f0354c /common-user | |
parent | 58d178fb8bb3177777dbc6f1c7946ec4b84b8da6 (diff) | |
download | qemu-082d783bf02eaafa4610fbdd9fe8b1749bcf0e2d.zip qemu-082d783bf02eaafa4610fbdd9fe8b1749bcf0e2d.tar.gz qemu-082d783bf02eaafa4610fbdd9fe8b1749bcf0e2d.tar.bz2 |
target/ppc: Simplify powerpc_excp_6xx
Differences from the generic powerpc_excp code:
- Not BookE, so some MSR bits are cleared at interrupt dispatch;
- No MSR_HV;
- No power saving states;
- No Hypervisor Emulation Assistance;
- Not 64 bits;
- No System call vectored;
- No Alternate Interrupt Location.
Exceptions used:
POWERPC_EXCP_ALIGN
POWERPC_EXCP_CRITICAL
POWERPC_EXCP_DABR
POWERPC_EXCP_DECR
POWERPC_EXCP_DLTLB
POWERPC_EXCP_DSI
POWERPC_EXCP_DSTLB
POWERPC_EXCP_DTLB
POWERPC_EXCP_EXTERNAL
POWERPC_EXCP_FPA
POWERPC_EXCP_FPU
POWERPC_EXCP_IABR
POWERPC_EXCP_IFTLB
POWERPC_EXCP_ISI
POWERPC_EXCP_ITLB
POWERPC_EXCP_MCHECK
POWERPC_EXCP_MEXTBR
POWERPC_EXCP_NMEXTBR
POWERPC_EXCP_PROGRAM
POWERPC_EXCP_RESET
POWERPC_EXCP_SMI
POWERPC_EXCP_SYSCALL
POWERPC_EXCP_TRACE
Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Message-Id: <20220203200957.1434641-4-farosas@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'common-user')
0 files changed, 0 insertions, 0 deletions