diff options
author | Warner Losh <imp@FreeBSD.org> | 2021-08-06 14:02:10 -0600 |
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committer | Warner Losh <imp@bsdimp.com> | 2021-09-10 14:13:06 -0600 |
commit | e4442059ddcc985207ac857a9509a606fe4bd179 (patch) | |
tree | ca0fbfefe5395bc82ed6315ad4317f00f8fff2eb /bsd-user | |
parent | 6a3b9bfde0aff84d1bf2901c89a0d7485e1229d0 (diff) | |
download | qemu-e4442059ddcc985207ac857a9509a606fe4bd179.zip qemu-e4442059ddcc985207ac857a9509a606fe4bd179.tar.gz qemu-e4442059ddcc985207ac857a9509a606fe4bd179.tar.bz2 |
bsd-user: Add target_arch_reg to describe a target's register set
target_reg_t is the normal register. target_fpreg_t is the floating
point registers. target_copy_regs copies the registers out of CPU
context for things like core dumps.
Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'bsd-user')
-rw-r--r-- | bsd-user/i386/target_arch_reg.h | 82 | ||||
-rw-r--r-- | bsd-user/x86_64/target_arch_reg.h | 92 |
2 files changed, 174 insertions, 0 deletions
diff --git a/bsd-user/i386/target_arch_reg.h b/bsd-user/i386/target_arch_reg.h new file mode 100644 index 0000000..1fce1da --- /dev/null +++ b/bsd-user/i386/target_arch_reg.h @@ -0,0 +1,82 @@ +/* + * FreeBSD i386 register structures + * + * Copyright (c) 2015 Stacey Son + * All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef _TARGET_ARCH_REG_H_ +#define _TARGET_ARCH_REG_H_ + +/* See sys/i386/include/reg.h */ +typedef struct target_reg { + uint32_t r_fs; + uint32_t r_es; + uint32_t r_ds; + uint32_t r_edi; + uint32_t r_esi; + uint32_t r_ebp; + uint32_t r_isp; + uint32_t r_ebx; + uint32_t r_edx; + uint32_t r_ecx; + uint32_t r_eax; + uint32_t r_trapno; + uint32_t r_err; + uint32_t r_eip; + uint32_t r_cs; + uint32_t r_eflags; + uint32_t r_esp; + uint32_t r_ss; + uint32_t r_gs; +} target_reg_t; + +typedef struct target_fpreg { + uint32_t fpr_env[7]; + uint8_t fpr_acc[8][10]; + uint32_t fpr_ex_sw; + uint8_t fpr_pad[64]; +} target_fpreg_t; + +static inline void target_copy_regs(target_reg_t *regs, const CPUX86State *env) +{ + + regs->r_fs = env->segs[R_FS].selector & 0xffff; + regs->r_es = env->segs[R_ES].selector & 0xffff; + regs->r_ds = env->segs[R_DS].selector & 0xffff; + + regs->r_edi = env->regs[R_EDI]; + regs->r_esi = env->regs[R_ESI]; + regs->r_ebp = env->regs[R_EBP]; + /* regs->r_isp = env->regs[R_ISP]; XXX */ + regs->r_ebx = env->regs[R_EBX]; + regs->r_edx = env->regs[R_EDX]; + regs->r_ecx = env->regs[R_ECX]; + regs->r_eax = env->regs[R_EAX]; + /* regs->r_trapno = env->regs[R_TRAPNO]; XXX */ + regs->r_err = env->error_code; /* XXX ? */ + regs->r_eip = env->eip; + + regs->r_cs = env->segs[R_CS].selector & 0xffff; + + regs->r_eflags = env->eflags; + regs->r_esp = env->regs[R_ESP]; + + regs->r_ss = env->segs[R_SS].selector & 0xffff; + regs->r_gs = env->segs[R_GS].selector & 0xffff; +} + +#endif /* !_TARGET_ARCH_REG_H_ */ diff --git a/bsd-user/x86_64/target_arch_reg.h b/bsd-user/x86_64/target_arch_reg.h new file mode 100644 index 0000000..00e9624 --- /dev/null +++ b/bsd-user/x86_64/target_arch_reg.h @@ -0,0 +1,92 @@ +/* + * FreeBSD amd64 register structures + * + * Copyright (c) 2015 Stacey Son + * All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef _TARGET_ARCH_REG_H_ +#define _TARGET_ARCH_REG_H_ + +/* See sys/amd64/include/reg.h */ +typedef struct target_reg { + uint64_t r_r15; + uint64_t r_r14; + uint64_t r_r13; + uint64_t r_r12; + uint64_t r_r11; + uint64_t r_r10; + uint64_t r_r9; + uint64_t r_r8; + uint64_t r_rdi; + uint64_t r_rsi; + uint64_t r_rbp; + uint64_t r_rbx; + uint64_t r_rdx; + uint64_t r_rcx; + uint64_t r_rax; + uint32_t r_trapno; + uint16_t r_fs; + uint16_t r_gs; + uint32_t r_err; + uint16_t r_es; + uint16_t r_ds; + uint64_t r_rip; + uint64_t r_cs; + uint64_t r_rflags; + uint64_t r_rsp; + uint64_t r_ss; +} target_reg_t; + +typedef struct target_fpreg { + uint64_t fpr_env[4]; + uint8_t fpr_acc[8][16]; + uint8_t fpr_xacc[16][16]; + uint64_t fpr_spare[12]; +} target_fpreg_t; + +static inline void target_copy_regs(target_reg_t *regs, const CPUX86State *env) +{ + + regs->r_r15 = env->regs[15]; + regs->r_r14 = env->regs[14]; + regs->r_r13 = env->regs[13]; + regs->r_r12 = env->regs[12]; + regs->r_r11 = env->regs[11]; + regs->r_r10 = env->regs[10]; + regs->r_r9 = env->regs[9]; + regs->r_r8 = env->regs[8]; + regs->r_rdi = env->regs[R_EDI]; + regs->r_rsi = env->regs[R_ESI]; + regs->r_rbp = env->regs[R_EBP]; + regs->r_rbx = env->regs[R_EBX]; + regs->r_rdx = env->regs[R_EDX]; + regs->r_rcx = env->regs[R_ECX]; + regs->r_rax = env->regs[R_EAX]; + /* regs->r_trapno = env->regs[R_TRAPNO]; XXX */ + regs->r_fs = env->segs[R_FS].selector & 0xffff; + regs->r_gs = env->segs[R_GS].selector & 0xffff; + regs->r_err = env->error_code; /* XXX ? */ + regs->r_es = env->segs[R_ES].selector & 0xffff; + regs->r_ds = env->segs[R_DS].selector & 0xffff; + regs->r_rip = env->eip; + regs->r_cs = env->segs[R_CS].selector & 0xffff; + regs->r_rflags = env->eflags; + regs->r_rsp = env->regs[R_ESP]; + regs->r_ss = env->segs[R_SS].selector & 0xffff; +} + +#endif /* !_TARGET_ARCH_REG_H_ */ |