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authorRichard Henderson <richard.henderson@linaro.org>2020-08-20 20:49:18 -0700
committerRichard Henderson <richard.henderson@linaro.org>2020-09-01 07:41:38 -0700
commit41ba37c4778e9364348e4ffe448650ae5e4b3563 (patch)
tree74e861a33867aa3609cd9b0017647af3f7c6b8b5 /bsd-user
parentdbdb77c4df97205f9fbe1ec10ad35c1cb9729c12 (diff)
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target/microblaze: Tidy raising of exceptions
Split out gen_raise_exception which does no cpu state sync. Rename t_gen_raise_exception to gen_raise_exception_sync to emphasize that it does a sync. Create gen_raise_hw_excp to simplify code raising EXCP_HW_EXCP. Since there is now only one use of cpu_esr, perform a store instead and remove the TCG variable. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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