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authorYongbok Kim <yongbok.kim@imgtec.com>2016-03-24 15:49:58 +0000
committerLeon Alrae <leon.alrae@imgtec.com>2016-03-30 09:14:00 +0100
commitf6d4dd810983fdf3d1c9fb81838167efef63d1c8 (patch)
treef38749caeb52b4c6e6360a6c0bf8ff9bf7325a15 /block/qapi.c
parentc98d3d79ee387ea6e8fb091299f8562b20022f10 (diff)
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target-mips: add MAAR, MAARI register
The MAAR register is a read/write register included in Release 5 of the architecture that defines the accessibility attributes of physical address regions. In particular, MAAR defines whether an instruction fetch or data load can speculatively access a memory region within the physical address bounds specified by MAAR. As QEMU doesn't do speculative access, hence this patch only provides ability to access the registers. Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
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