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author | Aurelien Jarno <aurelien@aurel32.net> | 2012-09-21 18:20:26 +0200 |
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committer | Aurelien Jarno <aurelien@aurel32.net> | 2012-09-22 15:10:20 +0200 |
commit | c1cf85c9acb847c4871c0b241ced8fabf410d502 (patch) | |
tree | 103a4dba75c4b111c829797304cb80cb3425d11f /arch_init.c | |
parent | 0f46c064eebc9c93b8f925416e0812cc7b4bb503 (diff) | |
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tcg/mips: optimize bswap{16,16s,32} on MIPS32R2
bswap operations can be optimized on MIPS32 Release 2 using the ROTR,
WSBH and SEH instructions. We can't use the non-R2 code to implement the
ops due to registers constraints, so don't define the corresponding
TCG_TARGET_HAS_bswap* values.
Also bswap16* operations are supposed to be called with the 16 high bits
zeroed. This is the case everywhere (including for TCG by definition)
except when called from the store helper. Remove the AND instructions from
bswap16* and move it there.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'arch_init.c')
0 files changed, 0 insertions, 0 deletions