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| author | Richard Henderson <richard.henderson@linaro.org> | 2022-10-10 20:18:57 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-10-20 11:27:49 +0100 |
| commit | f3639a64f602ea5c1436eb9c9b89f42028e3a4a8 (patch) | |
| tree | 23fbc572beedae7856fc430988a8012b310d8615 /accel | |
| parent | 4e7a2c9860eabd21376da522ef11e6b39fe36f85 (diff) | |
| download | qemu-f3639a64f602ea5c1436eb9c9b89f42028e3a4a8.zip qemu-f3639a64f602ea5c1436eb9c9b89f42028e3a4a8.tar.gz qemu-f3639a64f602ea5c1436eb9c9b89f42028e3a4a8.tar.bz2 | |
target/arm: Use softmmu tlbs for page table walking
So far, limit the change to S1_ptw_translate, arm_ldl_ptw, and
arm_ldq_ptw. Use probe_access_full to find the host address,
and if so use a host load. If the probe fails, we've got our
fault info already. On the off chance that page tables are not
in RAM, continue to use the address_space_ld* functions.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20221011031911.2408754-11-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'accel')
0 files changed, 0 insertions, 0 deletions