aboutsummaryrefslogtreecommitdiff
path: root/accel
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2018-08-14 17:17:19 +0100
committerPeter Maydell <peter.maydell@linaro.org>2018-08-14 17:17:19 +0100
commitc360a0fd71239948197f81737ba8b4eb132915f1 (patch)
treec8ed25c7f75afefd9bbe6646d8add6329e641baf /accel
parent7252f2dea9d0854872f9b6df4e8f94c56accd076 (diff)
downloadqemu-c360a0fd71239948197f81737ba8b4eb132915f1.zip
qemu-c360a0fd71239948197f81737ba8b4eb132915f1.tar.gz
qemu-c360a0fd71239948197f81737ba8b4eb132915f1.tar.bz2
accel/tcg: Handle get_page_addr_code() returning -1 in tb_check_watchpoint()
When we support execution from non-RAM MMIO regions, get_page_addr_code() will return -1 to indicate that there is no RAM at the requested address. Handle this in tb_check_watchpoint() -- if the exception happened for a PC which doesn't correspond to RAM then there is no need to invalidate any TBs, because the one-instruction TB will not have been cached. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Cédric Le Goater <clg@kaod.org> Message-id: 20180710160013.26559-4-peter.maydell@linaro.org
Diffstat (limited to 'accel')
-rw-r--r--accel/tcg/translate-all.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 1571987..ff7d014 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -2121,7 +2121,9 @@ void tb_check_watchpoint(CPUState *cpu)
cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
addr = get_page_addr_code(env, pc);
- tb_invalidate_phys_range(addr, addr + 1);
+ if (addr != -1) {
+ tb_invalidate_phys_range(addr, addr + 1);
+ }
}
}