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| author | Alex Bennée <alex.bennee@linaro.org> | 2019-06-03 15:56:32 +0100 |
|---|---|---|
| committer | Alex Bennée <alex.bennee@linaro.org> | 2019-06-12 17:53:22 +0100 |
| commit | 8c79b288513587e960b6b7257a9d955d5592f209 (patch) | |
| tree | 387e7d351a921ca0c4adb87ca0edecbb0f25a5e8 /accel | |
| parent | 78e24848f6a2923f356d15d8751c644f94a39fd8 (diff) | |
| download | qemu-8c79b288513587e960b6b7257a9d955d5592f209.zip qemu-8c79b288513587e960b6b7257a9d955d5592f209.tar.gz qemu-8c79b288513587e960b6b7257a9d955d5592f209.tar.bz2 | |
cputlb: use uint64_t for interim values for unaligned load
When running on 32 bit TCG backends a wide unaligned load ends up
truncating data before returning to the guest. We specifically have
the return type as uint64_t to avoid any premature truncation so we
should use the same for the interim types.
Fixes: https://bugs.launchpad.net/qemu/+bug/1830872
Fixes: eed5664238e
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Igor Mammedov <imammedo@redhat.com>
Diffstat (limited to 'accel')
| -rw-r--r-- | accel/tcg/cputlb.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index baa3eb8..8d68919 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1315,7 +1315,7 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, && unlikely((addr & ~TARGET_PAGE_MASK) + size - 1 >= TARGET_PAGE_SIZE)) { target_ulong addr1, addr2; - tcg_target_ulong r1, r2; + uint64_t r1, r2; unsigned shift; do_unaligned_access: addr1 = addr & ~(size - 1); |