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author | Peter Maydell <peter.maydell@linaro.org> | 2020-02-14 18:37:11 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2020-02-14 18:37:11 +0000 |
commit | 971b2a1e5b1a8cc8f597ac5d7016908f9fa880de (patch) | |
tree | 7aee8af6c2feaf1ad70c1c06becbb59902e5c871 /MAINTAINERS | |
parent | b29c3e23f64938784c42ef9fca896829e3c19120 (diff) | |
parent | 9c8fdcece53e05590441785ab22d91a22da36e29 (diff) | |
download | qemu-971b2a1e5b1a8cc8f597ac5d7016908f9fa880de.zip qemu-971b2a1e5b1a8cc8f597ac5d7016908f9fa880de.tar.gz qemu-971b2a1e5b1a8cc8f597ac5d7016908f9fa880de.tar.bz2 |
Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-5.0-sf2' into staging
RISC-V Patches for the 5.0 Soft Freeze, Part 2
This is a fairly light-weight pull request, but I wanted to send it out to
avoid the Goldfish stuff getting buried as the next PR should contain the H
extension implementation.
As far as this PR goes, it contains:
* The addition of syscon device tree nodes for reboot and poweroff, which
allows Linux to control QEMU without an additional driver. The existing
device was already compatible with the syscon interface.
* A fix to our GDB stub to avoid confusing XLEN and FLEN, specifically useful
for rv32id-based systems.
* A device emulation for the Goldfish RTC device, a simple memory-mapped RTC.
* The addition of the Goldfish RTC device to the RISC-V virt board.
This passes "make check" and boots buildroot for me.
# gpg: Signature made Mon 10 Feb 2020 21:28:04 GMT
# gpg: using RSA key 2B3C3747446843B24A943A7A2E1319F35FBB1889
# gpg: issuer "palmer@dabbelt.com"
# gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>" [unknown]
# gpg: aka "Palmer Dabbelt <palmer@sifive.com>" [unknown]
# gpg: aka "Palmer Dabbelt <palmerdabbelt@google.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 00CE 76D1 8349 60DF CE88 6DF8 EF4C A150 2CCB AB41
# Subkey fingerprint: 2B3C 3747 4468 43B2 4A94 3A7A 2E13 19F3 5FBB 1889
* remotes/palmer/tags/riscv-for-master-5.0-sf2:
MAINTAINERS: Add maintainer entry for Goldfish RTC
riscv: virt: Use Goldfish RTC device
hw: rtc: Add Goldfish RTC device
riscv: Separate FPU register size from core register size in gdbstub [v2]
riscv/virt: Add syscon reboot and poweroff DT nodes
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'MAINTAINERS')
-rw-r--r-- | MAINTAINERS | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index c7717df..1740a4f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -562,6 +562,14 @@ F: include/hw/arm/digic.h F: hw/*/digic* F: include/hw/*/digic* +Goldfish RTC +M: Anup Patel <anup.patel@wdc.com> +M: Alistair Francis <Alistair.Francis@wdc.com> +L: qemu-riscv@nongnu.org +S: Maintained +F: hw/rtc/goldfish_rtc.c +F: include/hw/rtc/goldfish_rtc.h + Gumstix M: Peter Maydell <peter.maydell@linaro.org> R: Philippe Mathieu-Daudé <f4bug@amsat.org> |