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| author | Peter Maydell <peter.maydell@linaro.org> | 2019-02-01 14:55:43 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-02-01 14:55:43 +0000 |
| commit | 5aeb36896600ff92aee1083ed17e80f069befb93 (patch) | |
| tree | 306ba784eb755b101d8a7c0b887bb537aa9a63a7 /MAINTAINERS | |
| parent | c1f572579eefe18e56c7135e2a7c0698f0488b92 (diff) | |
| download | qemu-5aeb36896600ff92aee1083ed17e80f069befb93.zip qemu-5aeb36896600ff92aee1083ed17e80f069befb93.tar.gz qemu-5aeb36896600ff92aee1083ed17e80f069befb93.tar.bz2 | |
hw/misc/armsse-cpuid: Implement SSE-200 CPU_IDENTITY register block
The SSE-200 has a CPU_IDENTITY register block, which is a set of
read-only registers. As well as the usual PID/CID registers, there
is a single CPUID register which indicates whether the CPU is CPU 0
or CPU 1. Implement a model of this register block.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190121185118.18550-20-peter.maydell@linaro.org
Diffstat (limited to 'MAINTAINERS')
| -rw-r--r-- | MAINTAINERS | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index c2ad4e5..a70ecb1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -631,6 +631,8 @@ F: hw/misc/iotkit-sysctl.c F: include/hw/misc/iotkit-sysctl.h F: hw/misc/iotkit-sysinfo.c F: include/hw/misc/iotkit-sysinfo.h +F: hw/misc/armsse-cpuid.c +F: include/hw/misc/armsse-cpuid.h Musicpal M: Jan Kiszka <jan.kiszka@web.de> |