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| author | Peter Maydell <peter.maydell@linaro.org> | 2024-01-09 14:43:46 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-01-09 14:43:46 +0000 |
| commit | 29a15a61679dd35d8e2f4ea2c5fca77e476324db (patch) | |
| tree | 66d5295f6c6fc24730dcb10a797a305ea1a247b7 /MAINTAINERS | |
| parent | b9377d1c5f366e3c914fb32ca13a2178ea901b2d (diff) | |
| download | qemu-29a15a61679dd35d8e2f4ea2c5fca77e476324db.zip qemu-29a15a61679dd35d8e2f4ea2c5fca77e476324db.tar.gz qemu-29a15a61679dd35d8e2f4ea2c5fca77e476324db.tar.bz2 | |
target/arm: Allow use of upper 32 bits of TBFLAG_A64
The TBFLAG_A64 TB flag bits go in flags2, which for AArch64 guests
we know is 64 bits. However at the moment we use FIELD_EX32() and
FIELD_DP32() to read and write these bits, which only works for
bits 0 to 31. Since we're about to add a flag that uses bit 32,
switch to FIELD_EX64() and FIELD_DP64() so that this will work.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Miguel Luis <miguel.luis@oracle.com>
Diffstat (limited to 'MAINTAINERS')
0 files changed, 0 insertions, 0 deletions