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authordan tan <dantan@linux.ibm.com>2025-01-16 09:42:26 -0600
committerNicholas Piggin <npiggin@gmail.com>2025-03-11 22:43:31 +1000
commitffb6440cc5e755d3cdf0cf317880576517cb0de7 (patch)
tree24f9a456a27e99c29f0694dc532591565e4a81fd
parent3e84d0381578467931d1145a32a55b7e1c3b2b9e (diff)
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ppc/pnv: Add new PowerPC Special Purpose Registers (RWMR)
Register RWMR - Region Weighted Mode Register for privileged access in Power9 and Power10 It controls what the SPURR register produces. Specs: - Power10: https://files.openpower.foundation/s/EgCy7C43p2NSRfR TCG does not model SMT priority, timing, resource controls and status so this register has no effect for now. [npiggin: adjust changelog] Signed-off-by: dan tan <dantan@linux.ibm.com> Message-ID: <20250116154226.13376-1-dantan@linux.vnet.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
-rw-r--r--target/ppc/cpu.h1
-rw-r--r--target/ppc/cpu_init.c5
2 files changed, 6 insertions, 0 deletions
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 682583d..25b1e6d 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -2102,6 +2102,7 @@ void ppc_compat_add_property(Object *obj, const char *name,
#define SPR_PMCR (0x374)
#define SPR_440_ITV0 (0x374)
#define SPR_440_ITV1 (0x375)
+#define SPR_RWMR (0x375)
#define SPR_440_ITV2 (0x376)
#define SPR_440_ITV3 (0x377)
#define SPR_440_CCR1 (0x378)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 54035c7..8d73e11 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -5773,6 +5773,11 @@ static void register_power9_book4_sprs(CPUPPCState *env)
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_generic,
KVM_REG_PPC_WORT, 0);
+ spr_register_hv(env, SPR_RWMR, "RWMR",
+ SPR_NOACCESS, SPR_NOACCESS,
+ &spr_read_generic, &spr_write_generic,
+ &spr_read_generic, &spr_write_generic,
+ 0x00000000);
#endif
}