aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorGustavo Romero <gustavo.romero@linaro.org>2024-09-10 18:38:56 +0100
committerAlex Bennée <alex.bennee@linaro.org>2024-09-10 23:33:48 +0100
commitf6110605313aaea66307f2470a85b7c053542442 (patch)
tree80ac48912e84a02462e3ba079f2b3dd04156b5e3
parent8c68c11cf3a940c14f23a599a78f0baf3c536d7a (diff)
downloadqemu-f6110605313aaea66307f2470a85b7c053542442.zip
qemu-f6110605313aaea66307f2470a85b7c053542442.tar.gz
qemu-f6110605313aaea66307f2470a85b7c053542442.tar.bz2
gdbstub: Use specific MMU index when probing MTE addresses
Use cpu_mmu_index() to determine the specific translation regime (MMU index) before probing addresses using allocation_tag_mem_probe(). Currently, the MMU index is hardcoded to 0 and only works for user mode. By obtaining the specific MMU index according to the translation regime, future use of the stubs relying on allocation_tag_mem_probe in other regimes will be possible, like in EL1. This commit also changes the ptr_size value passed to allocation_tag_mem_probe() from 8 to 1. The ptr_size parameter actually represents the number of bytes in the memory access (which can be as small as 1 byte), rather than the number of bits used in the address space pointed to by ptr. Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240906143316.657436-2-gustavo.romero@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240910173900.4154726-7-alex.bennee@linaro.org>
-rw-r--r--target/arm/gdbstub64.c17
1 files changed, 13 insertions, 4 deletions
diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c
index 5221381..85a19c1 100644
--- a/target/arm/gdbstub64.c
+++ b/target/arm/gdbstub64.c
@@ -435,6 +435,7 @@ static void handle_q_memtag(GArray *params, void *user_ctx)
{
ARMCPU *cpu = ARM_CPU(user_ctx);
CPUARMState *env = &cpu->env;
+ uint32_t mmu_index;
uint64_t addr = gdb_get_cmd_param(params, 0)->val_ull;
uint64_t len = gdb_get_cmd_param(params, 1)->val_ul;
@@ -458,8 +459,10 @@ static void handle_q_memtag(GArray *params, void *user_ctx)
gdb_put_packet("E03");
}
+ /* Find out the current translation regime for probe. */
+ mmu_index = cpu_mmu_index(env_cpu(env), false);
/* Note that tags are packed here (2 tags packed in one byte). */
- tags = allocation_tag_mem_probe(env, 0, addr, MMU_DATA_LOAD, 8 /* 64-bit */,
+ tags = allocation_tag_mem_probe(env, mmu_index, addr, MMU_DATA_LOAD, 1,
MMU_DATA_LOAD, true, 0);
if (!tags) {
/* Address is not in a tagged region. */
@@ -478,13 +481,16 @@ static void handle_q_isaddresstagged(GArray *params, void *user_ctx)
{
ARMCPU *cpu = ARM_CPU(user_ctx);
CPUARMState *env = &cpu->env;
+ uint32_t mmu_index;
uint64_t addr = gdb_get_cmd_param(params, 0)->val_ull;
uint8_t *tags;
const char *reply;
- tags = allocation_tag_mem_probe(env, 0, addr, MMU_DATA_LOAD, 8 /* 64-bit */,
+ /* Find out the current translation regime for probe. */
+ mmu_index = cpu_mmu_index(env_cpu(env), false);
+ tags = allocation_tag_mem_probe(env, mmu_index, addr, MMU_DATA_LOAD, 1,
MMU_DATA_LOAD, true, 0);
reply = tags ? "01" : "00";
@@ -495,6 +501,7 @@ static void handle_Q_memtag(GArray *params, void *user_ctx)
{
ARMCPU *cpu = ARM_CPU(user_ctx);
CPUARMState *env = &cpu->env;
+ uint32_t mmu_index;
uint64_t start_addr = gdb_get_cmd_param(params, 0)->val_ull;
uint64_t len = gdb_get_cmd_param(params, 1)->val_ul;
@@ -527,8 +534,10 @@ static void handle_Q_memtag(GArray *params, void *user_ctx)
* Get all tags in the page starting from the tag of the start address.
* Note that there are two tags packed into a single byte here.
*/
- tags = allocation_tag_mem_probe(env, 0, start_addr, MMU_DATA_STORE,
- 8 /* 64-bit */, MMU_DATA_STORE, true, 0);
+ /* Find out the current translation regime for probe. */
+ mmu_index = cpu_mmu_index(env_cpu(env), false);
+ tags = allocation_tag_mem_probe(env, mmu_index, start_addr, MMU_DATA_STORE,
+ 1, MMU_DATA_STORE, true, 0);
if (!tags) {
/* Address is not in a tagged region. */
gdb_put_packet("E04");