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| author | Richard Henderson <richard.henderson@linaro.org> | 2021-03-09 07:53:03 -0800 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-03-12 12:40:10 +0000 |
| commit | f556a201b5bbeb59841b37247969fcfc1ab7bd5d (patch) | |
| tree | 82139696ccc0a08595d6beb9ef7937b55b3d58ec | |
| parent | 04c774a25da78eb07d505ee5923167c2010b9f8c (diff) | |
| download | qemu-f556a201b5bbeb59841b37247969fcfc1ab7bd5d.zip qemu-f556a201b5bbeb59841b37247969fcfc1ab7bd5d.tar.gz qemu-f556a201b5bbeb59841b37247969fcfc1ab7bd5d.tar.bz2 | |
target/arm: Update CNTP for PREDDESC
Since b64ee454a4a0, all predicate operations should be
using these field macros for predicates.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210309155305.11301-7-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target/arm/sve_helper.c | 6 | ||||
| -rw-r--r-- | target/arm/translate-sve.c | 6 |
2 files changed, 6 insertions, 6 deletions
diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c index 8e0a5d3..a95bbec 100644 --- a/target/arm/sve_helper.c +++ b/target/arm/sve_helper.c @@ -2836,12 +2836,12 @@ uint32_t HELPER(sve_brkns)(void *vd, void *vn, void *vg, uint32_t pred_desc) uint64_t HELPER(sve_cntp)(void *vn, void *vg, uint32_t pred_desc) { - intptr_t oprsz = extract32(pred_desc, 0, SIMD_OPRSZ_BITS) + 2; - intptr_t esz = extract32(pred_desc, SIMD_DATA_SHIFT, 2); + intptr_t words = DIV_ROUND_UP(FIELD_EX32(pred_desc, PREDDESC, OPRSZ), 8); + intptr_t esz = FIELD_EX32(pred_desc, PREDDESC, ESZ); uint64_t *n = vn, *g = vg, sum = 0, mask = pred_esz_masks[esz]; intptr_t i; - for (i = 0; i < DIV_ROUND_UP(oprsz, 8); ++i) { + for (i = 0; i < words; ++i) { uint64_t t = n[i] & g[i] & mask; sum += ctpop64(t); } diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c index c0212e6..722805c 100644 --- a/target/arm/translate-sve.c +++ b/target/arm/translate-sve.c @@ -2967,11 +2967,11 @@ static void do_cntp(DisasContext *s, TCGv_i64 val, int esz, int pn, int pg) } else { TCGv_ptr t_pn = tcg_temp_new_ptr(); TCGv_ptr t_pg = tcg_temp_new_ptr(); - unsigned desc; + unsigned desc = 0; TCGv_i32 t_desc; - desc = psz - 2; - desc = deposit32(desc, SIMD_DATA_SHIFT, 2, esz); + desc = FIELD_DP32(desc, PREDDESC, OPRSZ, psz); + desc = FIELD_DP32(desc, PREDDESC, ESZ, esz); tcg_gen_addi_ptr(t_pn, cpu_env, pred_full_reg_offset(s, pn)); tcg_gen_addi_ptr(t_pg, cpu_env, pred_full_reg_offset(s, pg)); |