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| author | Peter Maydell <peter.maydell@linaro.org> | 2020-11-17 15:09:43 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-11-17 15:09:43 +0000 |
| commit | f45fc83bc0a540676d592b59aef610b0b2ee59f6 (patch) | |
| tree | 5356797d99451893175ebce19c03bb0dbff719e8 | |
| parent | 6b728efcb01fd809e60f85093fd36ef63aa01dbf (diff) | |
| parent | 575094b786e999e5fbd04c0456f518a5ebefab5b (diff) | |
| download | qemu-f45fc83bc0a540676d592b59aef610b0b2ee59f6.zip qemu-f45fc83bc0a540676d592b59aef610b0b2ee59f6.tar.gz qemu-f45fc83bc0a540676d592b59aef610b0b2ee59f6.tar.bz2 | |
Merge remote-tracking branch 'remotes/philmd-gitlab/tags/sdmmc-20201117' into staging
SD/MMC patches
- Correctly handle 2 GB SCSD Memory Cards (Bin Meng)
CI jobs result:
. https://cirrus-ci.com/build/4688743904837632
. https://gitlab.com/philmd/qemu/-/pipelines/216829732
. https://travis-ci.org/github/philmd/qemu/builds/744026099
# gpg: Signature made Tue 17 Nov 2020 10:51:13 GMT
# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* remotes/philmd-gitlab/tags/sdmmc-20201117:
hw/sd: Fix 2 GiB card CSD register values
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | hw/sd/sd.c | 15 |
1 files changed, 11 insertions, 4 deletions
@@ -389,10 +389,17 @@ static const uint8_t sd_csd_rw_mask[16] = { static void sd_set_csd(SDState *sd, uint64_t size) { - uint32_t csize = (size >> (CMULT_SHIFT + HWBLOCK_SHIFT)) - 1; + int hwblock_shift = HWBLOCK_SHIFT; + uint32_t csize; uint32_t sectsize = (1 << (SECTOR_SHIFT + 1)) - 1; uint32_t wpsize = (1 << (WPGROUP_SHIFT + 1)) - 1; + /* To indicate 2 GiB card, BLOCK_LEN shall be 1024 bytes */ + if (size == SDSC_MAX_CAPACITY) { + hwblock_shift += 1; + } + csize = (size >> (CMULT_SHIFT + hwblock_shift)) - 1; + if (size <= SDSC_MAX_CAPACITY) { /* Standard Capacity SD */ sd->csd[0] = 0x00; /* CSD structure */ sd->csd[1] = 0x26; /* Data read access-time-1 */ @@ -400,7 +407,7 @@ static void sd_set_csd(SDState *sd, uint64_t size) sd->csd[3] = 0x32; /* Max. data transfer rate: 25 MHz */ sd->csd[4] = 0x5f; /* Card Command Classes */ sd->csd[5] = 0x50 | /* Max. read data block length */ - HWBLOCK_SHIFT; + hwblock_shift; sd->csd[6] = 0xe0 | /* Partial block for read allowed */ ((csize >> 10) & 0x03); sd->csd[7] = 0x00 | /* Device size */ @@ -414,9 +421,9 @@ static void sd_set_csd(SDState *sd, uint64_t size) sd->csd[11] = 0x00 | /* Write protect group size */ ((sectsize << 7) & 0x80) | wpsize; sd->csd[12] = 0x90 | /* Write speed factor */ - (HWBLOCK_SHIFT >> 2); + (hwblock_shift >> 2); sd->csd[13] = 0x20 | /* Max. write data block length */ - ((HWBLOCK_SHIFT << 6) & 0xc0); + ((hwblock_shift << 6) & 0xc0); sd->csd[14] = 0x00; /* File format group */ } else { /* SDHC */ size /= 512 * KiB; |