diff options
author | Bernhard Beschow <shentey@gmail.com> | 2025-03-18 21:57:09 +0100 |
---|---|---|
committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-03-31 16:25:59 +0200 |
commit | f32d678252134779d1f129d80435e827877136f5 (patch) | |
tree | f136073a7ca99f88d663f0895599b2144b294619 | |
parent | 26c1c41e8ca2d510a3bdb888d9341a07ab13b20c (diff) | |
download | qemu-f32d678252134779d1f129d80435e827877136f5.zip qemu-f32d678252134779d1f129d80435e827877136f5.tar.gz qemu-f32d678252134779d1f129d80435e827877136f5.tar.bz2 |
hw/arm/fsl-imx8mp: Remove unused define
The SoC has three SPI controllers, not four.
Remove the extra define of an SPI IRQ.
Fixes: 06908a84f036 "hw/arm/fsl-imx8mp: Add SPI controllers"
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20250318205709.28862-4-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
-rw-r--r-- | include/hw/arm/fsl-imx8mp.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/include/hw/arm/fsl-imx8mp.h b/include/hw/arm/fsl-imx8mp.h index 22fdc0d..d016f7d 100644 --- a/include/hw/arm/fsl-imx8mp.h +++ b/include/hw/arm/fsl-imx8mp.h @@ -238,7 +238,6 @@ enum FslImx8mpIrqs { FSL_IMX8MP_ECSPI1_IRQ = 31, FSL_IMX8MP_ECSPI2_IRQ = 32, FSL_IMX8MP_ECSPI3_IRQ = 33, - FSL_IMX8MP_ECSPI4_IRQ = 34, FSL_IMX8MP_I2C1_IRQ = 35, FSL_IMX8MP_I2C2_IRQ = 36, |