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| author | Mayuresh Chitale <mchitale@ventanamicro.com> | 2023-03-03 12:20:54 +0530 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2023-03-05 15:33:39 -0800 |
| commit | f1bd6f8ef6a47de7c10c8d94f526cc10b7d25c4d (patch) | |
| tree | 45c8e2dcdcdf1b06fc41f204977f3db2837be8e3 | |
| parent | 270629024df1f9f4e704ce8325f958858c5cbff7 (diff) | |
| download | qemu-f1bd6f8ef6a47de7c10c8d94f526cc10b7d25c4d.zip qemu-f1bd6f8ef6a47de7c10c8d94f526cc10b7d25c4d.tar.gz qemu-f1bd6f8ef6a47de7c10c8d94f526cc10b7d25c4d.tar.bz2 | |
target/riscv: cpu: Implement get_arch_id callback
Implement the callback for getting the architecture-dependent CPU ID ie
mhartid.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20230303065055.915652-2-mchitale@ventanamicro.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
| -rw-r--r-- | target/riscv/cpu.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 3e8f21a..0ad8f94 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1301,6 +1301,13 @@ static const char *riscv_gdb_get_dynamic_xml(CPUState *cs, const char *xmlname) } #ifndef CONFIG_USER_ONLY +static int64_t riscv_get_arch_id(CPUState *cs) +{ + RISCVCPU *cpu = RISCV_CPU(cs); + + return cpu->env.mhartid; +} + #include "hw/core/sysemu-cpu-ops.h" static const struct SysemuCPUOps riscv_sysemu_ops = { @@ -1355,6 +1362,7 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data) cc->disas_set_info = riscv_cpu_disas_set_info; #ifndef CONFIG_USER_ONLY cc->sysemu_ops = &riscv_sysemu_ops; + cc->get_arch_id = riscv_get_arch_id; #endif cc->gdb_arch_name = riscv_gdb_arch_name; cc->gdb_get_dynamic_xml = riscv_gdb_get_dynamic_xml; |