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| author | Xin Li <xin3.li@intel.com> | 2023-11-08 23:20:11 -0800 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2024-06-08 10:33:38 +0200 |
| commit | ef202d64c3020f3df03c39d3ad688732d81aaae8 (patch) | |
| tree | 729c5d73356011dab6bf8623f3944dc72497c078 | |
| parent | 2e641870170e28df28c5d9914e76ea7cab141516 (diff) | |
| download | qemu-ef202d64c3020f3df03c39d3ad688732d81aaae8.zip qemu-ef202d64c3020f3df03c39d3ad688732d81aaae8.tar.gz qemu-ef202d64c3020f3df03c39d3ad688732d81aaae8.tar.bz2 | |
target/i386: enumerate VMX nested-exception support
Allow VMX nested-exception support to be exposed in KVM guests, thus
nested KVM guests can enumerate it.
Tested-by: Shan Kang <shan.kang@intel.com>
Signed-off-by: Xin Li <xin3.li@intel.com>
Message-ID: <20231109072012.8078-6-xin3.li@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| -rwxr-xr-x | scripts/kvm/vmxcap | 1 | ||||
| -rw-r--r-- | target/i386/cpu.c | 1 | ||||
| -rw-r--r-- | target/i386/cpu.h | 1 |
3 files changed, 3 insertions, 0 deletions
diff --git a/scripts/kvm/vmxcap b/scripts/kvm/vmxcap index 44898d7..508be19 100755 --- a/scripts/kvm/vmxcap +++ b/scripts/kvm/vmxcap @@ -117,6 +117,7 @@ controls = [ 54: 'INS/OUTS instruction information', 55: 'IA32_VMX_TRUE_*_CTLS support', 56: 'Skip checks on event error code', + 58: 'VMX nested exception support', }, msr = MSR_IA32_VMX_BASIC, ), diff --git a/target/i386/cpu.c b/target/i386/cpu.c index bfb5a25..383230f 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1492,6 +1492,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = { [54] = "vmx-ins-outs", [55] = "vmx-true-ctls", [56] = "vmx-any-errcode", + [58] = "vmx-nested-exception", }, .msr = { .index = MSR_IA32_VMX_BASIC, diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 9a58221..8ff27e9 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1071,6 +1071,7 @@ uint64_t x86_cpu_get_supported_feature_word(FeatureWord w, #define MSR_VMX_BASIC_INS_OUTS (1ULL << 54) #define MSR_VMX_BASIC_TRUE_CTLS (1ULL << 55) #define MSR_VMX_BASIC_ANY_ERRCODE (1ULL << 56) +#define MSR_VMX_BASIC_NESTED_EXCEPTION (1ULL << 58) #define MSR_VMX_MISC_PREEMPTION_TIMER_SHIFT_MASK 0x1Full #define MSR_VMX_MISC_STORE_LMA (1ULL << 5) |