diff options
| author | Jiaxi Chen <jiaxi.chen@linux.intel.com> | 2023-03-03 14:59:12 +0800 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2023-04-28 12:50:34 +0200 |
| commit | ecd2e6ca037d7bf3673c5478590d686d5cd6135a (patch) | |
| tree | b821fad2b88ccdcd8412a3b90a9775d52946b3ea | |
| parent | eaaa197d5b112ea2758b54df58881a2626de3af5 (diff) | |
| download | qemu-ecd2e6ca037d7bf3673c5478590d686d5cd6135a.zip qemu-ecd2e6ca037d7bf3673c5478590d686d5cd6135a.tar.gz qemu-ecd2e6ca037d7bf3673c5478590d686d5cd6135a.tar.bz2 | |
target/i386: Add support for AVX-NE-CONVERT in CPUID enumeration
AVX-NE-CONVERT is a new set of instructions which can convert low
precision floating point like BF16/FP16 to high precision floating point
FP32, as well as convert FP32 elements to BF16. This instruction allows
the platform to have improved AI capabilities and better compatibility.
The bit definition:
CPUID.(EAX=7,ECX=1):EDX[bit 5]
Add CPUID definition for AVX-NE-CONVERT.
Signed-off-by: Jiaxi Chen <jiaxi.chen@linux.intel.com>
Signed-off-by: Tao Su <tao1.su@linux.intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Message-Id: <20230303065913.1246327-6-tao1.su@linux.intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| -rw-r--r-- | target/i386/cpu.c | 2 | ||||
| -rw-r--r-- | target/i386/cpu.h | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index abceab2..0204a3a 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -895,7 +895,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = { .type = CPUID_FEATURE_WORD, .feat_names = { NULL, NULL, NULL, NULL, - "avx-vnni-int8", NULL, NULL, NULL, + "avx-vnni-int8", "avx-ne-convert", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 0b25d18..b46d52f 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -923,6 +923,8 @@ uint64_t x86_cpu_get_supported_feature_word(FeatureWord w, /* Support for VPDPB[SU,UU,SS]D[,S] */ #define CPUID_7_1_EDX_AVX_VNNI_INT8 (1U << 4) +/* AVX NE CONVERT Instructions */ +#define CPUID_7_1_EDX_AVX_NE_CONVERT (1U << 5) /* XFD Extend Feature Disabled */ #define CPUID_D_1_EAX_XFD (1U << 4) |