diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2025-02-16 14:22:48 -0800 |
---|---|---|
committer | Richard Henderson <richard.henderson@linaro.org> | 2025-04-28 13:40:17 -0700 |
commit | eafecf08059953a2d1d06b6a6ded3c56916cbdd4 (patch) | |
tree | 1a0dc2f08e5132e83e5b24f80c4aba71edb70e57 | |
parent | 86fe5c2597ca165228ee9cd082886846de4c9ece (diff) | |
download | qemu-eafecf08059953a2d1d06b6a6ded3c56916cbdd4.zip qemu-eafecf08059953a2d1d06b6a6ded3c56916cbdd4.tar.gz qemu-eafecf08059953a2d1d06b6a6ded3c56916cbdd4.tar.bz2 |
tcg: Remove tcg_out_op
All integer opcodes are now converted to TCGOutOp.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
-rw-r--r-- | tcg/aarch64/tcg-target.c.inc | 7 | ||||
-rw-r--r-- | tcg/arm/tcg-target.c.inc | 7 | ||||
-rw-r--r-- | tcg/i386/tcg-target.c.inc | 7 | ||||
-rw-r--r-- | tcg/loongarch64/tcg-target.c.inc | 7 | ||||
-rw-r--r-- | tcg/mips/tcg-target.c.inc | 7 | ||||
-rw-r--r-- | tcg/ppc/tcg-target.c.inc | 7 | ||||
-rw-r--r-- | tcg/riscv/tcg-target.c.inc | 7 | ||||
-rw-r--r-- | tcg/s390x/tcg-target.c.inc | 7 | ||||
-rw-r--r-- | tcg/sparc64/tcg-target.c.inc | 7 | ||||
-rw-r--r-- | tcg/tcg.c | 12 | ||||
-rw-r--r-- | tcg/tci/tcg-target.c.inc | 7 |
11 files changed, 3 insertions, 79 deletions
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index 59e7992a..4cb647c 100644 --- a/tcg/aarch64/tcg-target.c.inc +++ b/tcg/aarch64/tcg-target.c.inc @@ -2897,13 +2897,6 @@ static const TCGOutOpStore outop_st = { .out_r = tcg_out_st, }; -static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType ext, - const TCGArg args[TCG_MAX_OP_ARGS], - const int const_args[TCG_MAX_OP_ARGS]) -{ - g_assert_not_reached(); -} - static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, unsigned vecl, unsigned vece, const TCGArg args[TCG_MAX_OP_ARGS], diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc index 014a441..447e435 100644 --- a/tcg/arm/tcg-target.c.inc +++ b/tcg/arm/tcg-target.c.inc @@ -2640,13 +2640,6 @@ static const TCGOutOpStore outop_st = { .out_r = tcg_out_st, }; -static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type, - const TCGArg args[TCG_MAX_OP_ARGS], - const int const_args[TCG_MAX_OP_ARGS]) -{ - g_assert_not_reached(); -} - static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op, TCGType type, unsigned flags) { diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index 9f294f2..09fce27 100644 --- a/tcg/i386/tcg-target.c.inc +++ b/tcg/i386/tcg-target.c.inc @@ -3602,13 +3602,6 @@ static const TCGOutOpStore outop_st = { .out_i = tgen_st_i, }; -static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type, - const TCGArg args[TCG_MAX_OP_ARGS], - const int const_args[TCG_MAX_OP_ARGS]) -{ - g_assert_not_reached(); -} - static int const umin_insn[4] = { OPC_PMINUB, OPC_PMINUW, OPC_PMINUD, OPC_VPMINUQ }; diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index c74ddee..e5580d6 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++ b/tcg/loongarch64/tcg-target.c.inc @@ -2042,13 +2042,6 @@ static const TCGOutOpStore outop_st = { .out_r = tcg_out_st, }; -static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type, - const TCGArg args[TCG_MAX_OP_ARGS], - const int const_args[TCG_MAX_OP_ARGS]) -{ - g_assert_not_reached(); -} - static bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece, TCGReg rd, TCGReg rs) { diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc index 1f12500..2c0457e 100644 --- a/tcg/mips/tcg-target.c.inc +++ b/tcg/mips/tcg-target.c.inc @@ -2444,13 +2444,6 @@ static const TCGOutOpStore outop_st = { }; -static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type, - const TCGArg args[TCG_MAX_OP_ARGS], - const int const_args[TCG_MAX_OP_ARGS]) -{ - g_assert_not_reached(); -} - static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op, TCGType type, unsigned flags) { diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index 824cced..2e94778 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -3828,13 +3828,6 @@ static const TCGOutOpStore outop_st = { }; -static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type, - const TCGArg args[TCG_MAX_OP_ARGS], - const int const_args[TCG_MAX_OP_ARGS]) -{ - g_assert_not_reached(); -} - int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type, unsigned vece) { switch (opc) { diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc index eca1283..f9417d1 100644 --- a/tcg/riscv/tcg-target.c.inc +++ b/tcg/riscv/tcg-target.c.inc @@ -2642,13 +2642,6 @@ static const TCGOutOpStore outop_st = { }; -static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type, - const TCGArg args[TCG_MAX_OP_ARGS], - const int const_args[TCG_MAX_OP_ARGS]) -{ - g_assert_not_reached(); -} - static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, unsigned vecl, unsigned vece, const TCGArg args[TCG_MAX_OP_ARGS], diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index a316c8d..7ca0071 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -3160,13 +3160,6 @@ static const TCGOutOpStore outop_st = { }; -static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type, - const TCGArg args[TCG_MAX_OP_ARGS], - const int const_args[TCG_MAX_OP_ARGS]) -{ - g_assert_not_reached(); -} - static bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece, TCGReg dst, TCGReg src) { diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc index d1dd0fa..83167aa 100644 --- a/tcg/sparc64/tcg-target.c.inc +++ b/tcg/sparc64/tcg-target.c.inc @@ -2074,13 +2074,6 @@ static const TCGOutOpStore outop_st = { }; -static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type, - const TCGArg args[TCG_MAX_OP_ARGS], - const int const_args[TCG_MAX_OP_ARGS]) -{ - g_assert_not_reached(); -} - static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op, TCGType type, unsigned flags) { @@ -138,9 +138,6 @@ static void tcg_out_mb(TCGContext *s, unsigned bar); static void tcg_out_br(TCGContext *s, TCGLabel *l); static void tcg_out_set_carry(TCGContext *s); static void tcg_out_set_borrow(TCGContext *s); -static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type, - const TCGArg args[TCG_MAX_OP_ARGS], - const int const_args[TCG_MAX_OP_ARGS]); #if TCG_TARGET_MAYBE_vec static bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece, TCGReg dst, TCGReg src); @@ -5920,12 +5917,9 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op) break; default: - if (def->flags & TCG_OPF_VECTOR) { - tcg_out_vec_op(s, op->opc, type - TCG_TYPE_V64, - TCGOP_VECE(op), new_args, const_args); - } else { - tcg_out_op(s, op->opc, type, new_args, const_args); - } + tcg_debug_assert(def->flags & TCG_OPF_VECTOR); + tcg_out_vec_op(s, op->opc, type - TCG_TYPE_V64, + TCGOP_VECE(op), new_args, const_args); break; } diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 50e2052..35c66a4 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -1235,13 +1235,6 @@ static const TCGOutOpQemuLdSt2 outop_qemu_st2 = { TCG_TARGET_REG_BITS == 64 ? NULL : tgen_qemu_st2, }; -static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type, - const TCGArg args[TCG_MAX_OP_ARGS], - const int const_args[TCG_MAX_OP_ARGS]) -{ - g_assert_not_reached(); -} - static void tcg_out_st(TCGContext *s, TCGType type, TCGReg val, TCGReg base, intptr_t offset) { |