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authorYongbok Kim <yongbok.kim@imgtec.com>2016-11-30 15:25:04 +0000
committerYongbok Kim <yongbok.kim@imgtec.com>2016-12-04 00:57:06 +0000
commite6e2784cacd4cfec149a7690976b9ff15e541c4d (patch)
treeee873949b8c4404a837a9e6a3047c89f1431be61
parentb5a587b613f6151c2ce164552579ae64f2ddfd1c (diff)
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target-mips: fix bad shifts in {dextp|dextpdp}
Fixed issues in the MIPSDSP64 instructions dextp and dextpdp. Shifting can go out of 32 bit range. https://bugs.launchpad.net/qemu/+bug/1631625 Reported-by: Thomas Huth <thuth@redhat.com> Reported-by: Jia Liu <proljc@gmail.com> Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Thomas Huth <thuth@redhat.com>
-rw-r--r--target-mips/dsp_helper.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c
index df7d220..dc70793 100644
--- a/target-mips/dsp_helper.c
+++ b/target-mips/dsp_helper.c
@@ -3477,7 +3477,7 @@ target_ulong helper_dextp(target_ulong ac, target_ulong size, CPUMIPSState *env)
if (sub >= -1) {
temp = (tempB << (64 - len)) | (tempA >> len);
- temp = temp & ((0x01 << (size + 1)) - 1);
+ temp = temp & ((1ULL << (size + 1)) - 1);
set_DSPControl_efi(0, env);
} else {
set_DSPControl_efi(1, env);
@@ -3506,7 +3506,7 @@ target_ulong helper_dextpdp(target_ulong ac, target_ulong size,
if (sub >= -1) {
temp = (tempB << (64 - len)) | (tempA >> len);
- temp = temp & ((0x01 << (size + 1)) - 1);
+ temp = temp & ((1ULL << (size + 1)) - 1);
set_DSPControl_pos(sub, env);
set_DSPControl_efi(0, env);
} else {