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| author | Pierrick Bouvier <pierrick.bouvier@linaro.org> | 2024-09-18 21:46:29 -0700 |
|---|---|---|
| committer | Thomas Huth <thuth@redhat.com> | 2024-09-24 13:53:35 +0200 |
| commit | e67d261240638e4e130c99f9299655565a9d122d (patch) | |
| tree | 095a14d94f12a2515d34104cd4bf356d924b61ea | |
| parent | 200e25b140032bd09ee3d3f18b24f2974d3b702d (diff) | |
| download | qemu-e67d261240638e4e130c99f9299655565a9d122d.zip qemu-e67d261240638e4e130c99f9299655565a9d122d.tar.gz qemu-e67d261240638e4e130c99f9299655565a9d122d.tar.bz2 | |
target/riscv: remove break after g_assert_not_reached()
This patch is part of a series that moves towards a consistent use of
g_assert_not_reached() rather than an ad hoc mix of different
assertion mechanisms.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-ID: <20240919044641.386068-23-pierrick.bouvier@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
| -rw-r--r-- | target/riscv/insn_trans/trans_rvv.c.inc | 2 | ||||
| -rw-r--r-- | target/riscv/monitor.c | 1 |
2 files changed, 0 insertions, 3 deletions
diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index 3a3896b..f8928c4 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -3172,7 +3172,6 @@ static void load_element(TCGv_i64 dest, TCGv_ptr base, break; default: g_assert_not_reached(); - break; } } @@ -3257,7 +3256,6 @@ static void store_element(TCGv_i64 val, TCGv_ptr base, break; default: g_assert_not_reached(); - break; } } diff --git a/target/riscv/monitor.c b/target/riscv/monitor.c index f5b1ffe..100005e 100644 --- a/target/riscv/monitor.c +++ b/target/riscv/monitor.c @@ -184,7 +184,6 @@ static void mem_info_svxx(Monitor *mon, CPUArchState *env) break; default: g_assert_not_reached(); - break; } /* calculate virtual address bits */ |