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| author | Peter Maydell <peter.maydell@linaro.org> | 2019-03-18 15:00:15 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-03-18 15:00:15 +0000 |
| commit | e5b670c9f84a394a127f73d77400e52146f219ac (patch) | |
| tree | 3dac2fee9489aa60eb2425f39ff18d2cea867ae3 | |
| parent | 3c18a08cf387d44a351b9877497b5e0ea27c5140 (diff) | |
| parent | dc84ed5b57cc6d06955e2f49ade9dca277e92cd4 (diff) | |
| download | qemu-e5b670c9f84a394a127f73d77400e52146f219ac.zip qemu-e5b670c9f84a394a127f73d77400e52146f219ac.tar.gz qemu-e5b670c9f84a394a127f73d77400e52146f219ac.tar.bz2 | |
Merge remote-tracking branch 'remotes/kraxel/tags/vga-20190318-pull-request' into staging
vga: fixes for 4.0 (ati trace, virtio-gpu reset).
# gpg: Signature made Mon 18 Mar 2019 13:25:54 GMT
# gpg: using RSA key 4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138
* remotes/kraxel/tags/vga-20190318-pull-request:
virtio-gpu: clear command and fence queues on reset
virtio-gpu: delay virglrenderer reset when blocked.
ati-vga: fix tracing
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | hw/display/trace-events | 4 | ||||
| -rw-r--r-- | hw/display/virtio-gpu.c | 26 | ||||
| -rw-r--r-- | include/hw/virtio/virtio-gpu.h | 1 |
3 files changed, 28 insertions, 3 deletions
diff --git a/hw/display/trace-events b/hw/display/trace-events index 80993cc..c098543 100644 --- a/hw/display/trace-events +++ b/hw/display/trace-events @@ -140,5 +140,5 @@ sii9022_write_reg(uint8_t addr, uint8_t val) "addr 0x%02x, val 0x%02x" sii9022_switch_mode(const char *mode) "mode: %s" # hw/display/ati*.c -ati_mm_read(unsigned int size, uint64_t addr, const char *name, uint64_t val) "%u 0x%"HWADDR_PRIx " %s -> 0x%"PRIx64 -ati_mm_write(unsigned int size, uint64_t addr, const char *name, uint64_t val) "%u 0x%"HWADDR_PRIx " %s <- 0x%"PRIx64 +ati_mm_read(unsigned int size, uint64_t addr, const char *name, uint64_t val) "%u 0x%"PRIx64 " %s -> 0x%"PRIx64 +ati_mm_write(unsigned int size, uint64_t addr, const char *name, uint64_t val) "%u 0x%"PRIx64 " %s <- 0x%"PRIx64 diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 4dbf48e..9e37e0a 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -1084,6 +1084,12 @@ static void virtio_gpu_gl_block(void *opaque, bool block) assert(g->renderer_blocked >= 0); if (g->renderer_blocked == 0) { +#ifdef CONFIG_VIRGL + if (g->renderer_reset) { + g->renderer_reset = false; + virtio_gpu_virgl_reset(g); + } +#endif virtio_gpu_process_cmdq(g); } } @@ -1350,6 +1356,7 @@ static void virtio_gpu_reset(VirtIODevice *vdev) { VirtIOGPU *g = VIRTIO_GPU(vdev); struct virtio_gpu_simple_resource *res, *tmp; + struct virtio_gpu_ctrl_command *cmd; int i; g->enable = 0; @@ -1366,9 +1373,26 @@ static void virtio_gpu_reset(VirtIODevice *vdev) g->scanout[i].ds = NULL; } + while (!QTAILQ_EMPTY(&g->cmdq)) { + cmd = QTAILQ_FIRST(&g->cmdq); + QTAILQ_REMOVE(&g->cmdq, cmd, next); + g_free(cmd); + } + + while (!QTAILQ_EMPTY(&g->fenceq)) { + cmd = QTAILQ_FIRST(&g->fenceq); + QTAILQ_REMOVE(&g->fenceq, cmd, next); + g->inflight--; + g_free(cmd); + } + #ifdef CONFIG_VIRGL if (g->use_virgl_renderer) { - virtio_gpu_virgl_reset(g); + if (g->renderer_blocked) { + g->renderer_reset = true; + } else { + virtio_gpu_virgl_reset(g); + } g->use_virgl_renderer = 0; } #endif diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index ce0ca72..60425c5 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -113,6 +113,7 @@ typedef struct VirtIOGPU { bool use_virgl_renderer; bool renderer_inited; int renderer_blocked; + bool renderer_reset; QEMUTimer *fence_poll; QEMUTimer *print_stats; |