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author | Peter Maydell <peter.maydell@linaro.org> | 2017-08-04 14:23:29 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2017-08-04 14:23:29 +0100 |
commit | e59b1c5f677ca7e97709f606ad46947e9fdbb7bb (patch) | |
tree | fb5a6722e4b82ab53bdaa4d249d7eaaf26a6663e | |
parent | ac44ed2afb7c60255e989b163301479f5b4ecd04 (diff) | |
parent | 13aaef678ed377b12b76dc7fb9e615b2f2f9047b (diff) | |
download | qemu-e59b1c5f677ca7e97709f606ad46947e9fdbb7bb.zip qemu-e59b1c5f677ca7e97709f606ad46947e9fdbb7bb.tar.gz qemu-e59b1c5f677ca7e97709f606ad46947e9fdbb7bb.tar.bz2 |
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170803' into staging
Queued misc tcg patches
# gpg: Signature made Thu 03 Aug 2017 19:07:18 BST
# gpg: using RSA key 0xAD1270CC4DD0279B
# gpg: Good signature from "Richard Henderson <rth7680@gmail.com>"
# gpg: aka "Richard Henderson <rth@twiddle.net>"
# Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC 16A4 AD12 70CC 4DD0 279B
* remotes/rth/tags/pull-tcg-20170803:
tcg: Increase minimum alignment from tcg_malloc to 8
target/s390x: Fix CSST for 16-byte store
tcg/arm: Fix runtime overalignment test
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r-- | target/s390x/mem_helper.c | 1 | ||||
-rw-r--r-- | tcg/arm/tcg-target.inc.c | 2 | ||||
-rw-r--r-- | tcg/tcg.h | 5 |
3 files changed, 6 insertions, 2 deletions
diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index cdc78aa..c71dce4 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -1580,6 +1580,7 @@ uint32_t HELPER(csst)(CPUS390XState *env, uint32_t r3, uint64_t a1, uint64_t a2) cpu_stq_data_ra(env, a2 + 0, svh, ra); cpu_stq_data_ra(env, a2 + 8, svl, ra); } + break; default: g_assert_not_reached(); } diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c index d1793ec..37efcf0 100644 --- a/tcg/arm/tcg-target.inc.c +++ b/tcg/arm/tcg-target.inc.c @@ -1223,7 +1223,7 @@ static TCGReg tcg_out_tlb_read(TCGContext *s, TCGReg addrlo, TCGReg addrhi, /* Load the tlb addend. */ tcg_out_ld32_12(s, COND_AL, TCG_REG_R2, TCG_REG_R2, add_off); - tcg_out_dat_reg(s, (s_bits ? COND_EQ : COND_AL), ARITH_CMP, 0, + tcg_out_dat_reg(s, (a_bits ? COND_EQ : COND_AL), ARITH_CMP, 0, TCG_REG_R0, TCG_REG_TMP, SHIFT_IMM_LSL(TARGET_PAGE_BITS)); if (TARGET_LONG_BITS == 64) { @@ -762,7 +762,10 @@ static inline void *tcg_malloc(int size) { TCGContext *s = &tcg_ctx; uint8_t *ptr, *ptr_end; - size = (size + sizeof(long) - 1) & ~(sizeof(long) - 1); + + /* ??? This is a weak placeholder for minimum malloc alignment. */ + size = QEMU_ALIGN_UP(size, 8); + ptr = s->pool_cur; ptr_end = ptr + size; if (unlikely(ptr_end > s->pool_end)) { |