diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2018-05-22 15:15:12 -0700 |
---|---|---|
committer | Stafford Horne <shorne@gmail.com> | 2018-07-03 00:05:28 +0900 |
commit | e0a369cf88041a71cf5d902f1d78c9a645a6709e (patch) | |
tree | ddf0095e9a08f55f8a9670dd6121423097960715 | |
parent | 64e46c958162d986cc6e0cdfd6fb8f11b6f31748 (diff) | |
download | qemu-e0a369cf88041a71cf5d902f1d78c9a645a6709e.zip qemu-e0a369cf88041a71cf5d902f1d78c9a645a6709e.tar.gz qemu-e0a369cf88041a71cf5d902f1d78c9a645a6709e.tar.bz2 |
target/openrisc: Fix singlestep_enabled
We failed to store to cpu_pc before raising the exception,
which caused us to re-execute the same insn that we stepped.
Reviewed-by: Stafford Horne <shorne@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Stafford Horne <shorne@gmail.com>
-rw-r--r-- | target/openrisc/translate.c | 35 |
1 files changed, 17 insertions, 18 deletions
diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c index 43bdf37..22848b1 100644 --- a/target/openrisc/translate.c +++ b/target/openrisc/translate.c @@ -1335,31 +1335,30 @@ static void openrisc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) { DisasContext *dc = container_of(dcbase, DisasContext, base); + /* If we have already exited the TB, nothing following has effect. */ + if (dc->base.is_jmp == DISAS_NORETURN) { + return; + } + if ((dc->tb_flags & TB_FLAGS_DFLAG ? 1 : 0) != (dc->delayed_branch != 0)) { tcg_gen_movi_i32(cpu_dflag, dc->delayed_branch != 0); } tcg_gen_movi_tl(cpu_ppc, dc->base.pc_next - 4); - if (dc->base.is_jmp == DISAS_NEXT) { - dc->base.is_jmp = DISAS_UPDATE; - tcg_gen_movi_tl(cpu_pc, dc->base.pc_next); - } - if (unlikely(dc->base.singlestep_enabled)) { - gen_exception(dc, EXCP_DEBUG); - } else { - switch (dc->base.is_jmp) { - case DISAS_TOO_MANY: - gen_goto_tb(dc, 0, dc->base.pc_next); - break; - case DISAS_NORETURN: - break; - case DISAS_UPDATE: - case DISAS_EXIT: + switch (dc->base.is_jmp) { + case DISAS_TOO_MANY: + gen_goto_tb(dc, 0, dc->base.pc_next); + break; + case DISAS_UPDATE: + case DISAS_EXIT: + if (unlikely(dc->base.singlestep_enabled)) { + gen_exception(dc, EXCP_DEBUG); + } else { tcg_gen_exit_tb(NULL, 0); - break; - default: - g_assert_not_reached(); } + break; + default: + g_assert_not_reached(); } } |