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authorPhilippe Mathieu-Daudé <philmd@linaro.org>2025-01-10 19:01:31 +0100
committerPhilippe Mathieu-Daudé <philmd@linaro.org>2025-01-31 19:05:38 +0100
commitdc21331e67486782dc573285061fbeedce219c64 (patch)
tree51f94a0c2bb4248ff1c680380a2fead8b3ca97b4
parent871af84dd599fab68c8ed414d9ecbdb2bcfc5801 (diff)
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hw/rx/rx-gdbsim: Remove unnecessary uses of &first_cpu
rx_gdbsim_init() has access to the single CPU via: RxGdbSimMachineState { RX62NState { RXCPU cpu; ... } mcu; } s; Directly use that instead of the &first_cpu global. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250110180442.82687-1-philmd@linaro.org>
-rw-r--r--hw/rx/rx-gdbsim.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/rx/rx-gdbsim.c b/hw/rx/rx-gdbsim.c
index 02fdbdf..88c8f12 100644
--- a/hw/rx/rx-gdbsim.c
+++ b/hw/rx/rx-gdbsim.c
@@ -127,7 +127,7 @@ static void rx_gdbsim_init(MachineState *machine)
* the latter half of the SDRAM space.
*/
kernel_offset = machine->ram_size / 2;
- rx_load_image(RX_CPU(first_cpu), kernel_filename,
+ rx_load_image(&s->mcu.cpu, kernel_filename,
SDRAM_BASE + kernel_offset, kernel_offset);
if (dtb_filename) {
ram_addr_t dtb_offset;
@@ -153,7 +153,7 @@ static void rx_gdbsim_init(MachineState *machine)
qemu_register_reset_nosnapshotload(qemu_fdt_randomize_seeds,
rom_ptr(SDRAM_BASE + dtb_offset, dtb_size));
/* Set dtb address to R1 */
- RX_CPU(first_cpu)->env.regs[1] = SDRAM_BASE + dtb_offset;
+ s->mcu.cpu.env.regs[1] = SDRAM_BASE + dtb_offset;
}
}
}