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| author | Alex Bennée <alex.bennee@linaro.org> | 2024-03-05 12:10:05 +0000 |
|---|---|---|
| committer | Alex Bennée <alex.bennee@linaro.org> | 2024-03-06 12:35:51 +0000 |
| commit | db7e8b1f75662cf957f6bfad938ed112488518ed (patch) | |
| tree | 747302592a718868b870603c64bbbdf321f43f3e | |
| parent | f6e0eabdb4647275d98c63982c0065dd80be7caf (diff) | |
| download | qemu-db7e8b1f75662cf957f6bfad938ed112488518ed.zip qemu-db7e8b1f75662cf957f6bfad938ed112488518ed.tar.gz qemu-db7e8b1f75662cf957f6bfad938ed112488518ed.tar.bz2 | |
target/riscv: honour show_opcodes when disassembling
This makes the output suitable when used for plugins.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240305121005.3528075-30-alex.bennee@linaro.org>
| -rw-r--r-- | disas/riscv.c | 28 |
1 files changed, 15 insertions, 13 deletions
diff --git a/disas/riscv.c b/disas/riscv.c index 8a546d5..e236c8b 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -5192,19 +5192,21 @@ print_insn_riscv(bfd_vma memaddr, struct disassemble_info *info, rv_isa isa) } } - switch (len) { - case 2: - (*info->fprintf_func)(info->stream, INST_FMT_2, inst); - break; - case 4: - (*info->fprintf_func)(info->stream, INST_FMT_4, inst); - break; - case 6: - (*info->fprintf_func)(info->stream, INST_FMT_6, inst); - break; - default: - (*info->fprintf_func)(info->stream, INST_FMT_8, inst); - break; + if (info->show_opcodes) { + switch (len) { + case 2: + (*info->fprintf_func)(info->stream, INST_FMT_2, inst); + break; + case 4: + (*info->fprintf_func)(info->stream, INST_FMT_4, inst); + break; + case 6: + (*info->fprintf_func)(info->stream, INST_FMT_6, inst); + break; + default: + (*info->fprintf_func)(info->stream, INST_FMT_8, inst); + break; + } } disasm_inst(buf, sizeof(buf), isa, memaddr, inst, |