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authorPaolo Bonzini <pbonzini@redhat.com>2025-02-18 11:09:15 +0100
committerPaolo Bonzini <pbonzini@redhat.com>2025-05-20 08:18:28 +0200
commitdabb54c160b84d648f375d8f7688fb1099ba32ab (patch)
treeb9ebd7a604ca6bbf96d870eb2a90dfc3bc78afc8
parent211c7f9bb817ca7bb7855535da4db5ca80a8aa1d (diff)
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target/riscv: remove supported from RISCVSATPMap
"supported" can be computed on the fly based on the max_satp_mode. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
-rw-r--r--target/riscv/cpu.c30
-rw-r--r--target/riscv/cpu_cfg.h4
2 files changed, 23 insertions, 11 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 48576bf..0326cd8 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -439,14 +439,27 @@ static void set_satp_mode_max_supported(RISCVCPU *cpu,
bool rv32 = riscv_cpu_mxl(&cpu->env) == MXL_RV32;
const bool *valid_vm = rv32 ? valid_vm_1_10_32 : valid_vm_1_10_64;
+ assert(valid_vm[satp_mode]);
+ cpu->cfg.max_satp_mode = satp_mode;
+}
+
+static bool get_satp_mode_supported(RISCVCPU *cpu, uint16_t *supported)
+{
+ bool rv32 = riscv_cpu_is_32bit(cpu);
+ const bool *valid_vm = rv32 ? valid_vm_1_10_32 : valid_vm_1_10_64;
+ int satp_mode = cpu->cfg.max_satp_mode;
+
+ if (satp_mode == -1) {
+ return false;
+ }
+
+ *supported = 0;
for (int i = 0; i <= satp_mode; ++i) {
if (valid_vm[i]) {
- cpu->cfg.satp_mode.supported |= (1 << i);
+ *supported |= (1 << i);
}
}
-
- assert(cpu->cfg.satp_mode.supported & (1 << satp_mode));
- cpu->cfg.max_satp_mode = satp_mode;
+ return true;
}
/* Set the satp mode to the max supported */
@@ -1171,9 +1184,10 @@ static void riscv_cpu_disas_set_info(CPUState *s, disassemble_info *info)
static void riscv_cpu_satp_mode_finalize(RISCVCPU *cpu, Error **errp)
{
bool rv32 = riscv_cpu_is_32bit(cpu);
+ uint16_t supported;
uint8_t satp_mode_map_max;
- if (cpu->cfg.max_satp_mode == -1) {
+ if (!get_satp_mode_supported(cpu, &supported)) {
/* The CPU wants the hypervisor to decide which satp mode to allow */
return;
}
@@ -1190,9 +1204,9 @@ static void riscv_cpu_satp_mode_finalize(RISCVCPU *cpu, Error **errp)
*/
for (int i = 1; i < 16; ++i) {
if ((cpu->cfg.satp_mode.init & (1 << i)) &&
- (cpu->cfg.satp_mode.supported & (1 << i))) {
+ supported & (1 << i)) {
for (int j = i - 1; j >= 0; --j) {
- if (cpu->cfg.satp_mode.supported & (1 << j)) {
+ if (supported & (1 << j)) {
cpu->cfg.max_satp_mode = j;
return;
}
@@ -1221,7 +1235,7 @@ static void riscv_cpu_satp_mode_finalize(RISCVCPU *cpu, Error **errp)
for (int i = satp_mode_map_max - 1; i >= 0; --i) {
if (!(cpu->cfg.satp_mode.map & (1 << i)) &&
(cpu->cfg.satp_mode.init & (1 << i)) &&
- (cpu->cfg.satp_mode.supported & (1 << i))) {
+ (supported & (1 << i))) {
error_setg(errp, "cannot disable %s satp mode if %s "
"is enabled", satp_mode_str(i, false),
satp_mode_str(satp_mode_map_max, false));
diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h
index c8ea5cd..8b80e03 100644
--- a/target/riscv/cpu_cfg.h
+++ b/target/riscv/cpu_cfg.h
@@ -29,11 +29,9 @@
*
* init is a 16-bit bitmap used to make sure the user selected a correct
* configuration as per the specification.
- *
- * supported is a 16-bit bitmap used to reflect the hw capabilities.
*/
typedef struct {
- uint16_t map, init, supported;
+ uint16_t map, init;
} RISCVSATPMap;
struct RISCVCPUConfig {