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authorManos Pitsidianakis <manos.pitsidianakis@linaro.org>2024-12-11 14:44:40 +0000
committerPeter Maydell <peter.maydell@linaro.org>2024-12-17 15:17:46 +0000
commitdaae2280cad120a307083342ed0913f523b5aeb1 (patch)
treed4d6edfffe8a7bf15b7521efddb166fdd6160473
parent19db1d4da7ba78f3774624a4125c7c78542ed735 (diff)
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tests/tcg/aarch64: add system test for FEAT_XS
Add system test to make sure FEAT_XS is enabled for max cpu emulation and that QEMU doesn't crash when encountering an NXS instruction variant. Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20241211144440.2700268-7-peter.maydell@linaro.org [PMM: In ISAR field test, mask with 0xf, not 0xff; use < rather than an equality test to follow the standard ID register field check guidelines] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--tests/tcg/aarch64/system/feat-xs.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/tests/tcg/aarch64/system/feat-xs.c b/tests/tcg/aarch64/system/feat-xs.c
new file mode 100644
index 0000000..f310fc8
--- /dev/null
+++ b/tests/tcg/aarch64/system/feat-xs.c
@@ -0,0 +1,27 @@
+/*
+ * FEAT_XS Test
+ *
+ * Copyright (c) 2024 Linaro Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include <minilib.h>
+#include <stdint.h>
+
+int main(void)
+{
+ uint64_t isar1;
+
+ asm volatile ("mrs %0, id_aa64isar1_el1" : "=r"(isar1));
+ if (((isar1 >> 56) & 0xf) < 1) {
+ ml_printf("FEAT_XS not supported by CPU");
+ return 1;
+ }
+ /* VMALLE1NXS */
+ asm volatile (".inst 0xd508971f");
+ /* VMALLE1OSNXS */
+ asm volatile (".inst 0xd508911f");
+
+ return 0;
+}