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| author | David Hildenbrand <david@redhat.com> | 2019-01-23 09:24:25 +0100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2019-02-04 18:44:18 +1100 |
| commit | d8e81d6e6093738c23b457b607c44a75a6952dc8 (patch) | |
| tree | 57ab09e06fecfec86c6510e92e60a2c7682d1dd5 | |
| parent | 21df5e4ffafd067090882c312c5978ee7bb2f46f (diff) | |
| download | qemu-d8e81d6e6093738c23b457b607c44a75a6952dc8.zip qemu-d8e81d6e6093738c23b457b607c44a75a6952dc8.tar.gz qemu-d8e81d6e6093738c23b457b607c44a75a6952dc8.tar.bz2 | |
spapr/pci: Fix primary bus number for PCI bridges
While looking at the s390x implementation, looks like spapr has a
similar BUG when building the topology.
The primary bus number corresponds always to the bus number of the
bus the bridge is attached to.
Right now, if we have two bridges attached to the same bus (e.g. root
bus) this is however not the case. The first bridge will have primary
bus 0, the second bridge primary bus 1, which is wrong. Fix the assignment.
While at it, drop setting the PCI_SUBORDINATE_BUS temporarily to 0xff.
Setting it temporarily to that value (as discussed e.g. in [1]), is
only relevant for a running system that probes the buses. The value is
effectively unused for us just doing a DFS.
[1] http://www.science.unitn.it/~fiorella/guidelinux/tlk/node76.html
Signed-off-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| -rw-r--r-- | hw/ppc/spapr_pci.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index b74f263..5cdc985 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -2030,8 +2030,6 @@ static void spapr_phb_pci_enumerate_bridge(PCIBus *bus, PCIDevice *pdev, void *opaque) { unsigned int *bus_no = opaque; - unsigned int primary = *bus_no; - unsigned int subordinate = 0xff; PCIBus *sec_bus = NULL; if ((pci_default_read_config(pdev, PCI_HEADER_TYPE, 1) != @@ -2040,7 +2038,7 @@ static void spapr_phb_pci_enumerate_bridge(PCIBus *bus, PCIDevice *pdev, } (*bus_no)++; - pci_default_write_config(pdev, PCI_PRIMARY_BUS, primary, 1); + pci_default_write_config(pdev, PCI_PRIMARY_BUS, pci_dev_bus_num(pdev), 1); pci_default_write_config(pdev, PCI_SECONDARY_BUS, *bus_no, 1); pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, *bus_no, 1); @@ -2049,7 +2047,6 @@ static void spapr_phb_pci_enumerate_bridge(PCIBus *bus, PCIDevice *pdev, return; } - pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, subordinate, 1); pci_for_each_device(sec_bus, pci_bus_num(sec_bus), spapr_phb_pci_enumerate_bridge, bus_no); pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, *bus_no, 1); |