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authorJames Hogan <james.hogan@imgtec.com>2017-08-02 10:59:17 +0100
committerYongbok Kim <yongbok.kim@imgtec.com>2017-08-02 22:18:13 +0100
commitd673a68db6963e86536b125af464bb6ed03eba33 (patch)
tree1dbfcc5d36030e5b7219ff85e12a8320862486a9
parent51ca717b079dccae5b6cc9f45153f5044abd34f0 (diff)
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target/mips: Fix RDHWR CC with icount
RDHWR CC reads the CPU timer like MFC0 CP0_Count, so with icount enabled it must set can_do_io while it calls the helper to avoid the "Bad icount read" error. It should also break out of the translation loop to ensure that timer interrupts are immediately handled. Fixes: 2e70f6efa8b9 ("Add instruction counter.") Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
-rw-r--r--target/mips/translate.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c
index bcea2a1..c78d272 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -10755,8 +10755,19 @@ static void gen_rdhwr(DisasContext *ctx, int rt, int rd, int sel)
gen_store_gpr(t0, rt);
break;
case 2:
+ if (ctx->tb->cflags & CF_USE_ICOUNT) {
+ gen_io_start();
+ }
gen_helper_rdhwr_cc(t0, cpu_env);
+ if (ctx->tb->cflags & CF_USE_ICOUNT) {
+ gen_io_end();
+ }
gen_store_gpr(t0, rt);
+ /* Break the TB to be able to take timer interrupts immediately
+ after reading count. BS_STOP isn't sufficient, we need to ensure
+ we break completely out of translated code. */
+ gen_save_pc(ctx->pc + 4);
+ ctx->bstate = BS_EXCP;
break;
case 3:
gen_helper_rdhwr_ccres(t0, cpu_env);