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| author | Xiaoyao Li <xiaoyao.li@intel.com> | 2024-12-19 06:01:16 -0500 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2025-01-10 23:34:44 +0100 |
| commit | d3bb5d0d4f5d4ad7dc6c02ea5fea51ca2f946593 (patch) | |
| tree | cc7f35a9ad176bc4694454657685447a15e96f0b | |
| parent | d662b66da4bef9272144f7b79715aad90cdbc33e (diff) | |
| download | qemu-d3bb5d0d4f5d4ad7dc6c02ea5fea51ca2f946593.zip qemu-d3bb5d0d4f5d4ad7dc6c02ea5fea51ca2f946593.tar.gz qemu-d3bb5d0d4f5d4ad7dc6c02ea5fea51ca2f946593.tar.bz2 | |
i386/cpu: Extract a common fucntion to setup value of MSR_CORE_THREAD_COUNT
There are duplicated code to setup the value of MSR_CORE_THREAD_COUNT.
Extract a common function for it.
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20241219110125.1266461-2-xiaoyao.li@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| -rw-r--r-- | target/i386/cpu-system.c | 11 | ||||
| -rw-r--r-- | target/i386/cpu.h | 2 | ||||
| -rw-r--r-- | target/i386/hvf/x86_emu.c | 3 | ||||
| -rw-r--r-- | target/i386/kvm/kvm.c | 5 | ||||
| -rw-r--r-- | target/i386/tcg/system/misc_helper.c | 3 |
5 files changed, 16 insertions, 8 deletions
diff --git a/target/i386/cpu-system.c b/target/i386/cpu-system.c index 9d007af..eb38cca 100644 --- a/target/i386/cpu-system.c +++ b/target/i386/cpu-system.c @@ -309,3 +309,14 @@ void x86_cpu_get_crash_info_qom(Object *obj, Visitor *v, errp); qapi_free_GuestPanicInformation(panic_info); } + +uint64_t cpu_x86_get_msr_core_thread_count(X86CPU *cpu) +{ + CPUState *cs = CPU(cpu); + uint64_t val; + + val = cs->nr_threads * cs->nr_cores; /* thread count, bits 15..0 */ + val |= ((uint32_t)cs->nr_cores << 16); /* core count, bits 31..16 */ + + return val; +} diff --git a/target/i386/cpu.h b/target/i386/cpu.h index f41462d..e8c46d8 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2413,6 +2413,8 @@ static inline void cpu_x86_load_seg_cache_sipi(X86CPU *cpu, cs->halted = 0; } +uint64_t cpu_x86_get_msr_core_thread_count(X86CPU *cpu); + int cpu_x86_get_descr_debug(CPUX86State *env, unsigned int selector, target_ulong *base, unsigned int *limit, unsigned int *flags); diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c index 015f760..69c61c9 100644 --- a/target/i386/hvf/x86_emu.c +++ b/target/i386/hvf/x86_emu.c @@ -765,8 +765,7 @@ void simulate_rdmsr(CPUX86State *env) val = env->mtrr_deftype; break; case MSR_CORE_THREAD_COUNT: - val = cs->nr_threads * cs->nr_cores; /* thread count, bits 15..0 */ - val |= ((uint32_t)cs->nr_cores << 16); /* core count, bits 31..16 */ + val = cpu_x86_get_msr_core_thread_count(cpu); break; default: /* fprintf(stderr, "%s: unknown msr 0x%x\n", __func__, msr); */ diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 1d7214b..6c749d4 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -2614,10 +2614,7 @@ static bool kvm_rdmsr_core_thread_count(X86CPU *cpu, uint32_t msr, uint64_t *val) { - CPUState *cs = CPU(cpu); - - *val = cs->nr_threads * cs->nr_cores; /* thread count, bits 15..0 */ - *val |= ((uint32_t)cs->nr_cores << 16); /* core count, bits 31..16 */ + *val = cpu_x86_get_msr_core_thread_count(cpu); return true; } diff --git a/target/i386/tcg/system/misc_helper.c b/target/i386/tcg/system/misc_helper.c index ffed8a3..c9c4d42 100644 --- a/target/i386/tcg/system/misc_helper.c +++ b/target/i386/tcg/system/misc_helper.c @@ -468,8 +468,7 @@ void helper_rdmsr(CPUX86State *env) val = x86_cpu->ucode_rev; break; case MSR_CORE_THREAD_COUNT: { - CPUState *cs = CPU(x86_cpu); - val = (cs->nr_threads * cs->nr_cores) | (cs->nr_cores << 16); + val = cpu_x86_get_msr_core_thread_count(x86_cpu); break; } case MSR_APIC_START ... MSR_APIC_END: { |