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authorIdan Horowitz <idan.horowitz@gmail.com>2022-04-01 15:35:49 +0100
committerPeter Maydell <peter.maydell@linaro.org>2022-04-01 15:35:49 +0100
commitd3b2d191119ee3e6364e470b9579e6353d202e54 (patch)
tree10590a0578ef9c970f54483869e268767a0405b0
parent0da067f2a83c61efc6f1688d4379269420838b28 (diff)
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target/arm: Check VSTCR.SW when assigning the stage 2 output PA space
As per the AArch64.SS2OutputPASpace() psuedo-code in the ARMv8 ARM when the PA space of the IPA is non secure, the output PA space is secure if and only if all of the bits VTCR.<NSW, NSA>, VSTCR.<SW, SA> are not set. Signed-off-by: Idan Horowitz <idan.horowitz@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220327093427.1548629-2-idan.horowitz@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target/arm/helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 3aeaea4..a65b396 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -12697,7 +12697,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong address,
} else {
attrs->secure =
!((env->cp15.vtcr_el2.raw_tcr & (VTCR_NSA | VTCR_NSW))
- || (env->cp15.vstcr_el2.raw_tcr & VSTCR_SA));
+ || (env->cp15.vstcr_el2.raw_tcr & (VSTCR_SA | VSTCR_SW)));
}
}
return 0;