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authorRichard Henderson <richard.henderson@linaro.org>2025-03-28 14:28:06 -0500
committerRichard Henderson <richard.henderson@linaro.org>2025-04-23 15:04:57 -0700
commitd11bf649d587dec050b6ba900a8f9baea1fe157d (patch)
treea6e18a4b50dd0942de2d42d8f422415df2a95b37
parent12eeb04ab4dd98f802ffc503f0da948a8c843086 (diff)
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page-vary: Restrict scope of TARGET_PAGE_BITS_MIN
The only place we really need to know the minimum is within page-vary-target.c. Rename the target/arm TARGET_PAGE_BITS_MIN to TARGET_PAGE_BITS_LEGACY to emphasize what it really means. Move the assertions related to minimum page size as well. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
-rw-r--r--accel/tcg/cputlb.c1
-rw-r--r--include/exec/cpu-defs.h10
-rw-r--r--include/exec/target_page.h1
-rw-r--r--page-vary-target.c39
-rw-r--r--target/alpha/cpu-param.h1
-rw-r--r--target/arm/cpu-param.h3
-rw-r--r--target/ppc/cpu-param.h1
7 files changed, 39 insertions, 17 deletions
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 39314e8..0de4690 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -49,7 +49,6 @@
#endif
#include "tcg/tcg-ldst.h"
-QEMU_BUILD_BUG_ON(TLB_FLAGS_MASK & ((1u < TARGET_PAGE_BITS_MIN) - 1));
/* DEBUG defines, enable DEBUG_TLB_LOG to log to the CPU_LOG_MMU target */
/* #define DEBUG_TLB */
diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h
index 9f955f5..e01acb7 100644
--- a/include/exec/cpu-defs.h
+++ b/include/exec/cpu-defs.h
@@ -34,14 +34,8 @@
#ifndef TARGET_VIRT_ADDR_SPACE_BITS
# error TARGET_VIRT_ADDR_SPACE_BITS must be defined in cpu-param.h
#endif
-#ifndef TARGET_PAGE_BITS
-# ifdef TARGET_PAGE_BITS_VARY
-# ifndef TARGET_PAGE_BITS_MIN
-# error TARGET_PAGE_BITS_MIN must be defined in cpu-param.h
-# endif
-# else
-# error TARGET_PAGE_BITS must be defined in cpu-param.h
-# endif
+#if !defined(TARGET_PAGE_BITS) && !defined(TARGET_PAGE_BITS_VARY)
+# error TARGET_PAGE_BITS must be defined in cpu-param.h
#endif
#include "exec/target_long.h"
diff --git a/include/exec/target_page.h b/include/exec/target_page.h
index e4bd7f7..ca0ebbc 100644
--- a/include/exec/target_page.h
+++ b/include/exec/target_page.h
@@ -41,7 +41,6 @@ extern const TargetPageBits target_page;
# endif
# define TARGET_PAGE_SIZE (-(int)TARGET_PAGE_MASK)
#else
-# define TARGET_PAGE_BITS_MIN TARGET_PAGE_BITS
# define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS)
# define TARGET_PAGE_MASK ((TARGET_PAGE_TYPE)-1 << TARGET_PAGE_BITS)
#endif
diff --git a/page-vary-target.c b/page-vary-target.c
index 6251d94..49a32b4 100644
--- a/page-vary-target.c
+++ b/page-vary-target.c
@@ -23,19 +23,45 @@
#include "exec/page-vary.h"
#include "exec/target_page.h"
+
+/*
+ * For system mode, the minimum comes from the number of bits
+ * required for maximum alignment (6) and the number of bits
+ * required for TLB_FLAGS_MASK (3).
+ *
+ * For user mode, TARGET_PAGE_BITS_VARY is a hack to allow the target
+ * page size to match the host page size. Mostly, this reduces the
+ * ordinary target page size to run on a host with 4KiB pages (i.e. x86).
+ * There is no true minimum required by the implementation, but keep the
+ * same minimum as for system mode for sanity.
+ * See linux-user/mmap.c, mmap_h_lt_g and mmap_h_gt_g.
+ */
+#define TARGET_PAGE_BITS_MIN 9
+
+#ifndef TARGET_PAGE_BITS_VARY
+QEMU_BUILD_BUG_ON(TARGET_PAGE_BITS < TARGET_PAGE_BITS_MIN);
+#endif
+
+#ifndef CONFIG_USER_ONLY
+#include "exec/tlb-flags.h"
+
+QEMU_BUILD_BUG_ON(TLB_FLAGS_MASK & ((1u < TARGET_PAGE_BITS_MIN) - 1));
+
int migration_legacy_page_bits(void)
{
#ifdef TARGET_PAGE_BITS_VARY
- return TARGET_PAGE_BITS_MIN;
+ QEMU_BUILD_BUG_ON(TARGET_PAGE_BITS_LEGACY < TARGET_PAGE_BITS_MIN);
+ return TARGET_PAGE_BITS_LEGACY;
#else
return TARGET_PAGE_BITS;
#endif
}
+#endif
bool set_preferred_target_page_bits(int bits)
{
-#ifdef TARGET_PAGE_BITS_VARY
assert(bits >= TARGET_PAGE_BITS_MIN);
+#ifdef TARGET_PAGE_BITS_VARY
return set_preferred_target_page_bits_common(bits);
#else
return true;
@@ -44,5 +70,12 @@ bool set_preferred_target_page_bits(int bits)
void finalize_target_page_bits(void)
{
- finalize_target_page_bits_common(TARGET_PAGE_BITS_MIN);
+#ifndef TARGET_PAGE_BITS_VARY
+ finalize_target_page_bits_common(TARGET_PAGE_BITS);
+#elif defined(CONFIG_USER_ONLY)
+ assert(target_page.bits != 0);
+ finalize_target_page_bits_common(target_page.bits);
+#else
+ finalize_target_page_bits_common(TARGET_PAGE_BITS_LEGACY);
+#endif
}
diff --git a/target/alpha/cpu-param.h b/target/alpha/cpu-param.h
index ff06e41..63989e7 100644
--- a/target/alpha/cpu-param.h
+++ b/target/alpha/cpu-param.h
@@ -18,7 +18,6 @@
* a 4k minimum to match x86 host, which can minimize emulation issues.
*/
# define TARGET_PAGE_BITS_VARY
-# define TARGET_PAGE_BITS_MIN 12
# define TARGET_VIRT_ADDR_SPACE_BITS 63
#else
# define TARGET_PAGE_BITS 13
diff --git a/target/arm/cpu-param.h b/target/arm/cpu-param.h
index 896b35b..a7ae42d 100644
--- a/target/arm/cpu-param.h
+++ b/target/arm/cpu-param.h
@@ -24,7 +24,6 @@
# else
/* Allow user-only to vary page size from 4k */
# define TARGET_PAGE_BITS_VARY
-# define TARGET_PAGE_BITS_MIN 12
# endif
# else
# define TARGET_PAGE_BITS 12
@@ -35,7 +34,7 @@
* have to support 1K tiny pages.
*/
# define TARGET_PAGE_BITS_VARY
-# define TARGET_PAGE_BITS_MIN 10
+# define TARGET_PAGE_BITS_LEGACY 10
#endif /* !CONFIG_USER_ONLY */
/* ARM processors have a weak memory model */
diff --git a/target/ppc/cpu-param.h b/target/ppc/cpu-param.h
index 6c4525f..553ad2f 100644
--- a/target/ppc/cpu-param.h
+++ b/target/ppc/cpu-param.h
@@ -33,7 +33,6 @@
#ifdef CONFIG_USER_ONLY
/* Allow user-only to vary page size from 4k */
# define TARGET_PAGE_BITS_VARY
-# define TARGET_PAGE_BITS_MIN 12
#else
# define TARGET_PAGE_BITS 12
#endif