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| author | Frederic Barrat <fbarrat@linux.ibm.com> | 2024-09-13 11:16:50 -0500 |
|---|---|---|
| committer | Nicholas Piggin <npiggin@gmail.com> | 2024-11-04 09:14:29 +1000 |
| commit | cfeafb0d8cdba8aa7fa3f04e28430253faf051e3 (patch) | |
| tree | 1faee8304243c5281e32760c0aca82b1b5fb1faa | |
| parent | aa90c209bf672047947c1724b50a636a292b24b9 (diff) | |
| download | qemu-cfeafb0d8cdba8aa7fa3f04e28430253faf051e3.zip qemu-cfeafb0d8cdba8aa7fa3f04e28430253faf051e3.tar.gz qemu-cfeafb0d8cdba8aa7fa3f04e28430253faf051e3.tar.bz2 | |
ppc/xive2: Dump more NVP state with 'info pic'
The 'PGoFirst' field of a Notify Virtual Processor tells if the NVP
belongs to a VP group.
Also, print the Reporting Cache Line address, if defined.
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Michael Kowal <kowal@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
| -rw-r--r-- | hw/intc/xive2.c | 10 | ||||
| -rw-r--r-- | include/hw/ppc/xive2_regs.h | 1 |
2 files changed, 9 insertions, 2 deletions
diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c index fbd05aa..ac581fa 100644 --- a/hw/intc/xive2.c +++ b/hw/intc/xive2.c @@ -161,14 +161,20 @@ void xive2_nvp_pic_print_info(Xive2Nvp *nvp, uint32_t nvp_idx, GString *buf) { uint8_t eq_blk = xive_get_field32(NVP2_W5_VP_END_BLOCK, nvp->w5); uint32_t eq_idx = xive_get_field32(NVP2_W5_VP_END_INDEX, nvp->w5); + uint64_t cache_line = xive2_nvp_reporting_addr(nvp); if (!xive2_nvp_is_valid(nvp)) { return; } - g_string_append_printf(buf, " %08x end:%02x/%04x IPB:%02x", + g_string_append_printf(buf, " %08x end:%02x/%04x IPB:%02x PGoFirst:%02x", nvp_idx, eq_blk, eq_idx, - xive_get_field32(NVP2_W2_IPB, nvp->w2)); + xive_get_field32(NVP2_W2_IPB, nvp->w2), + xive_get_field32(NVP2_W0_PGOFIRST, nvp->w0)); + if (cache_line) { + g_string_append_printf(buf, " reporting CL:%016"PRIx64, cache_line); + } + /* * When the NVP is HW controlled, more fields are updated */ diff --git a/include/hw/ppc/xive2_regs.h b/include/hw/ppc/xive2_regs.h index 7acf7dc..d71a54f 100644 --- a/include/hw/ppc/xive2_regs.h +++ b/include/hw/ppc/xive2_regs.h @@ -151,6 +151,7 @@ typedef struct Xive2Nvp { #define NVP2_W0_VALID PPC_BIT32(0) #define NVP2_W0_HW PPC_BIT32(7) #define NVP2_W0_ESC_END PPC_BIT32(25) /* 'N' bit 0:ESB 1:END */ +#define NVP2_W0_PGOFIRST PPC_BITMASK32(26, 31) uint32_t w1; #define NVP2_W1_CO PPC_BIT32(13) #define NVP2_W1_CO_PRIV PPC_BITMASK32(14, 15) |