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| author | Nicholas Piggin <npiggin@gmail.com> | 2024-07-12 13:16:44 +1000 |
|---|---|---|
| committer | Nicholas Piggin <npiggin@gmail.com> | 2024-07-26 09:21:06 +1000 |
| commit | ca4f47752a14221a26cd2bf4710bb21ad2811a22 (patch) | |
| tree | 4ae0314313780cca399d89dedfd89627db98d658 | |
| parent | b1beb69231c8a6a04ec365614e67729ea9af7cbf (diff) | |
| download | qemu-ca4f47752a14221a26cd2bf4710bb21ad2811a22.zip qemu-ca4f47752a14221a26cd2bf4710bb21ad2811a22.tar.gz qemu-ca4f47752a14221a26cd2bf4710bb21ad2811a22.tar.bz2 | |
ppc/pnv: Add a CPU nmi and resume function
Power CPUs have an execution control facility that can pause, resume,
and cause NMIs, among other things. Add a function that will nmi a CPU
and resume it if it was paused, in preparation for implementing the
control facility.
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
| -rw-r--r-- | hw/ppc/pnv.c | 14 | ||||
| -rw-r--r-- | include/hw/ppc/pnv.h | 2 |
2 files changed, 15 insertions, 1 deletions
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index d19516c..084cfb9 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -2751,11 +2751,23 @@ static void pnv_cpu_do_nmi_on_cpu(CPUState *cs, run_on_cpu_data arg) */ env->spr[SPR_SRR1] |= SRR1_WAKESCOM; } + if (arg.host_int == 1) { + cpu_resume(cs); + } +} + +/* + * Send a SRESET (NMI) interrupt to the CPU, and resume execution if it was + * paused. + */ +void pnv_cpu_do_nmi_resume(CPUState *cs) +{ + async_run_on_cpu(cs, pnv_cpu_do_nmi_on_cpu, RUN_ON_CPU_HOST_INT(1)); } static void pnv_cpu_do_nmi(PnvChip *chip, PowerPCCPU *cpu, void *opaque) { - async_run_on_cpu(CPU(cpu), pnv_cpu_do_nmi_on_cpu, RUN_ON_CPU_NULL); + async_run_on_cpu(CPU(cpu), pnv_cpu_do_nmi_on_cpu, RUN_ON_CPU_HOST_INT(0)); } static void pnv_nmi(NMIState *n, int cpu_index, Error **errp) diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index c56d152..b7858d3 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -112,6 +112,8 @@ PnvChip *pnv_chip_add_phb(PnvChip *chip, PnvPHB *phb); #define PNV_FDT_ADDR 0x01000000 #define PNV_TIMEBASE_FREQ 512000000ULL +void pnv_cpu_do_nmi_resume(CPUState *cs); + /* * BMC helpers */ |