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| author | Peter Maydell <peter.maydell@linaro.org> | 2023-08-22 17:31:05 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2023-08-22 17:31:05 +0100 |
| commit | c986d860398ff44c32a612b3d8dfc9f89ffe5e52 (patch) | |
| tree | 68705facd07284087c9c31aa853ad5e1e3707846 | |
| parent | 43a5e377f42d1d3ed12ea562196f723b354ce411 (diff) | |
| download | qemu-c986d860398ff44c32a612b3d8dfc9f89ffe5e52.zip qemu-c986d860398ff44c32a612b3d8dfc9f89ffe5e52.tar.gz qemu-c986d860398ff44c32a612b3d8dfc9f89ffe5e52.tar.bz2 | |
target/arm/ptw: Don't set fi->s1ptw for UnsuppAtomicUpdate fault
For an Unsupported Atomic Update fault where the stage 1 translation
table descriptor update can't be done because it's to an unsupported
memory type, this is a stage 1 abort (per the Arm ARM R_VSXXT). This
means we should not set fi->s1ptw, because this will cause the code
in the get_phys_addr_lpae() error-exit path to mark it as stage 2.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230807141514.19075-2-peter.maydell@linaro.org
| -rw-r--r-- | target/arm/ptw.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 8f94100..bafeb87 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -701,7 +701,6 @@ static uint64_t arm_casq_ptw(CPUARMState *env, uint64_t old_val, if (unlikely(!host)) { fi->type = ARMFault_UnsuppAtomicUpdate; - fi->s1ptw = true; return 0; } |