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author | Bibo Mao <maobibo@loongson.cn> | 2025-01-06 15:36:27 +0800 |
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committer | Bibo Mao <maobibo@loongson.cn> | 2025-01-09 14:13:41 +0800 |
commit | c3afa714bcea4c8b014fec99881bd0bdbe8262b8 (patch) | |
tree | 1852464e74e5d245124598f4237dd88b97dc768f | |
parent | 0443b858873d1a80eb9ede901513b247b83ea76b (diff) | |
download | qemu-c3afa714bcea4c8b014fec99881bd0bdbe8262b8.zip qemu-c3afa714bcea4c8b014fec99881bd0bdbe8262b8.tar.gz qemu-c3afa714bcea4c8b014fec99881bd0bdbe8262b8.tar.bz2 |
hw/intc/loongarch_extioi: Add irq routing support from physical id
The simliar with IPI interrupt controller, physical cpu id is used
for irq routing for extioi interrupt controller.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
-rw-r--r-- | hw/intc/loongarch_extioi.c | 30 |
1 files changed, 26 insertions, 4 deletions
diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c index d18f47d..f3055ec 100644 --- a/hw/intc/loongarch_extioi.c +++ b/hw/intc/loongarch_extioi.c @@ -15,6 +15,23 @@ #include "hw/intc/loongarch_extioi.h" #include "trace.h" +static int extioi_get_index_from_archid(LoongArchExtIOICommonState *s, + uint64_t arch_id) +{ + int i; + + for (i = 0; i < s->num_cpu; i++) { + if (s->cpu[i].arch_id == arch_id) { + break; + } + } + + if ((i < s->num_cpu) && s->cpu[i].cpu) { + return i; + } + + return -1; +} static void extioi_update_irq(LoongArchExtIOICommonState *s, int irq, int level) { @@ -125,7 +142,7 @@ static inline void extioi_enable_irq(LoongArchExtIOICommonState *s, int index,\ static inline void extioi_update_sw_coremap(LoongArchExtIOICommonState *s, int irq, uint64_t val, bool notify) { - int i, cpu; + int i, cpu, cpuid; /* * loongarch only support little endian, @@ -134,12 +151,17 @@ static inline void extioi_update_sw_coremap(LoongArchExtIOICommonState *s, val = cpu_to_le64(val); for (i = 0; i < 4; i++) { - cpu = val & 0xff; + cpuid = val & 0xff; val = val >> 8; if (!(s->status & BIT(EXTIOI_ENABLE_CPU_ENCODE))) { - cpu = ctz32(cpu); - cpu = (cpu >= 4) ? 0 : cpu; + cpuid = ctz32(cpuid); + cpuid = (cpuid >= 4) ? 0 : cpuid; + } + + cpu = extioi_get_index_from_archid(s, cpuid); + if (cpu < 0) { + continue; } if (s->sw_coremap[irq + i] == cpu) { |