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authorPhilippe Mathieu-Daudé <philmd@redhat.com>2021-08-19 18:34:21 +0200
committerPeter Maydell <peter.maydell@linaro.org>2021-08-26 17:01:59 +0100
commitc31b7f59014252e8de02597ee3af956259bc0d5e (patch)
treede423a2f10515ca20cb86ed5e638109087ee8c1e
parent348ba7bede1513f7e5aba0b755380d2ff1720192 (diff)
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hw/dma/xlnx_csu_dma: Always expect 'dma' link property to be set
Simplify by always passing a MemoryRegion property to the device. Doing so we can move the AddressSpace field to the device struct, removing need for heap allocation. Update the Xilinx ZynqMP SoC model to pass the default system memory instead of a NULL value. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20210819163422.2863447-4-philmd@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--hw/arm/xlnx-zynqmp.c4
-rw-r--r--hw/dma/xlnx_csu_dma.c21
-rw-r--r--include/hw/dma/xlnx_csu_dma.h2
3 files changed, 15 insertions, 12 deletions
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 9724978..4344e22 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -620,6 +620,10 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
gic_spi[adma_ch_intr[i]]);
}
+ if (!object_property_set_link(OBJECT(&s->qspi_dma), "dma",
+ OBJECT(system_memory), errp)) {
+ return;
+ }
if (!sysbus_realize(SYS_BUS_DEVICE(&s->qspi_dma), errp)) {
return;
}
diff --git a/hw/dma/xlnx_csu_dma.c b/hw/dma/xlnx_csu_dma.c
index 2d19f41..896bb35 100644
--- a/hw/dma/xlnx_csu_dma.c
+++ b/hw/dma/xlnx_csu_dma.c
@@ -201,11 +201,11 @@ static uint32_t xlnx_csu_dma_read(XlnxCSUDMA *s, uint8_t *buf, uint32_t len)
for (i = 0; i < len && (result == MEMTX_OK); i += s->width) {
uint32_t mlen = MIN(len - i, s->width);
- result = address_space_rw(s->dma_as, addr, s->attr,
+ result = address_space_rw(&s->dma_as, addr, s->attr,
buf + i, mlen, false);
}
} else {
- result = address_space_rw(s->dma_as, addr, s->attr, buf, len, false);
+ result = address_space_rw(&s->dma_as, addr, s->attr, buf, len, false);
}
if (result == MEMTX_OK) {
@@ -232,12 +232,12 @@ static uint32_t xlnx_csu_dma_write(XlnxCSUDMA *s, uint8_t *buf, uint32_t len)
for (i = 0; i < len && (result == MEMTX_OK); i += s->width) {
uint32_t mlen = MIN(len - i, s->width);
- result = address_space_rw(s->dma_as, addr, s->attr,
+ result = address_space_rw(&s->dma_as, addr, s->attr,
buf, mlen, true);
buf += mlen;
}
} else {
- result = address_space_rw(s->dma_as, addr, s->attr, buf, len, true);
+ result = address_space_rw(&s->dma_as, addr, s->attr, buf, len, true);
}
if (result != MEMTX_OK) {
@@ -631,6 +631,12 @@ static void xlnx_csu_dma_realize(DeviceState *dev, Error **errp)
return;
}
+ if (!s->dma_mr) {
+ error_setg(errp, TYPE_XLNX_CSU_DMA " 'dma' link not set");
+ return;
+ }
+ address_space_init(&s->dma_as, s->dma_mr, "csu-dma");
+
reg_array =
register_init_block32(dev, xlnx_csu_dma_regs_info[!!s->is_dst],
XLNX_CSU_DMA_R_MAX,
@@ -648,13 +654,6 @@ static void xlnx_csu_dma_realize(DeviceState *dev, Error **errp)
s->src_timer = ptimer_init(xlnx_csu_dma_src_timeout_hit,
s, PTIMER_POLICY_DEFAULT);
- if (s->dma_mr) {
- s->dma_as = g_malloc0(sizeof(AddressSpace));
- address_space_init(s->dma_as, s->dma_mr, NULL);
- } else {
- s->dma_as = &address_space_memory;
- }
-
s->attr = MEMTXATTRS_UNSPECIFIED;
s->r_size_last_word = 0;
diff --git a/include/hw/dma/xlnx_csu_dma.h b/include/hw/dma/xlnx_csu_dma.h
index 204d94c..9e9dc55 100644
--- a/include/hw/dma/xlnx_csu_dma.h
+++ b/include/hw/dma/xlnx_csu_dma.h
@@ -30,7 +30,7 @@ typedef struct XlnxCSUDMA {
MemoryRegion iomem;
MemTxAttrs attr;
MemoryRegion *dma_mr;
- AddressSpace *dma_as;
+ AddressSpace dma_as;
qemu_irq irq;
StreamSink *tx_dev; /* Used as generic StreamSink */
ptimer_state *src_timer;