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| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-03-21 12:10:45 +0100 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2025-04-23 15:07:32 -0700 |
| commit | c2ba9fea42391c316794c78f0f6f01760b1fb0f7 (patch) | |
| tree | d2923ad1b146289da78b8a344f02af24d79a38ff | |
| parent | d864cbb65da2220038a9b3aff98ae7f73a3198d3 (diff) | |
| download | qemu-c2ba9fea42391c316794c78f0f6f01760b1fb0f7.zip qemu-c2ba9fea42391c316794c78f0f6f01760b1fb0f7.tar.gz qemu-c2ba9fea42391c316794c78f0f6f01760b1fb0f7.tar.bz2 | |
tcg: Always define TCG_GUEST_DEFAULT_MO
We only require the TCG_GUEST_DEFAULT_MO for MTTCG-enabled
frontends, otherwise we use a default value of TCG_MO_ALL.
In order to simplify, require the definition for all targets,
defining it for hexagon, m68k, rx, sh4 and tricore.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | accel/tcg/translate-all.c | 4 | ||||
| -rw-r--r-- | target/hexagon/cpu-param.h | 3 | ||||
| -rw-r--r-- | target/m68k/cpu-param.h | 3 | ||||
| -rw-r--r-- | target/rx/cpu-param.h | 3 | ||||
| -rw-r--r-- | target/sh4/cpu-param.h | 3 | ||||
| -rw-r--r-- | target/tricore/cpu-param.h | 3 |
6 files changed, 15 insertions, 4 deletions
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index c5590eb..7467255 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -353,11 +353,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu, tcg_ctx->tlb_dyn_max_bits = CPU_TLB_DYN_MAX_BITS; #endif tcg_ctx->insn_start_words = TARGET_INSN_START_WORDS; -#ifdef TCG_GUEST_DEFAULT_MO tcg_ctx->guest_mo = TCG_GUEST_DEFAULT_MO; -#else - tcg_ctx->guest_mo = TCG_MO_ALL; -#endif restart_translate: trace_translate_block(tb, pc, tb->tc.ptr); diff --git a/target/hexagon/cpu-param.h b/target/hexagon/cpu-param.h index 635d509e7..7cc63a0 100644 --- a/target/hexagon/cpu-param.h +++ b/target/hexagon/cpu-param.h @@ -25,4 +25,7 @@ #define TARGET_INSN_START_EXTRA_WORDS 0 +/* MTTCG not yet supported: require strict ordering */ +#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL + #endif diff --git a/target/m68k/cpu-param.h b/target/m68k/cpu-param.h index 256a2b5..10a8d74 100644 --- a/target/m68k/cpu-param.h +++ b/target/m68k/cpu-param.h @@ -19,4 +19,7 @@ #define TARGET_INSN_START_EXTRA_WORDS 1 +/* MTTCG not yet supported: require strict ordering */ +#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL + #endif diff --git a/target/rx/cpu-param.h b/target/rx/cpu-param.h index 84934f3..fe39a77 100644 --- a/target/rx/cpu-param.h +++ b/target/rx/cpu-param.h @@ -26,4 +26,7 @@ #define TARGET_INSN_START_EXTRA_WORDS 0 +/* MTTCG not yet supported: require strict ordering */ +#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL + #endif diff --git a/target/sh4/cpu-param.h b/target/sh4/cpu-param.h index f328715..acdf239 100644 --- a/target/sh4/cpu-param.h +++ b/target/sh4/cpu-param.h @@ -18,4 +18,7 @@ #define TARGET_INSN_START_EXTRA_WORDS 1 +/* MTTCG not yet supported: require strict ordering */ +#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL + #endif diff --git a/target/tricore/cpu-param.h b/target/tricore/cpu-param.h index eb33a67..45fde75 100644 --- a/target/tricore/cpu-param.h +++ b/target/tricore/cpu-param.h @@ -14,4 +14,7 @@ #define TARGET_INSN_START_EXTRA_WORDS 0 +/* MTTCG not yet supported: require strict ordering */ +#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL + #endif |