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author | Nicholas Piggin <npiggin@gmail.com> | 2023-11-13 22:04:06 +1000 |
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committer | Nicholas Piggin <npiggin@gmail.com> | 2024-02-23 23:24:43 +1000 |
commit | c191ad779372cc3b355ef10a355de8bb9b92efdc (patch) | |
tree | 90ea0cdb7ef53a4908a7c997eb8d54704d8fc0de | |
parent | e8fe14112bea38377409728b7b0d684bd187ff56 (diff) | |
download | qemu-c191ad779372cc3b355ef10a355de8bb9b92efdc.zip qemu-c191ad779372cc3b355ef10a355de8bb9b92efdc.tar.gz qemu-c191ad779372cc3b355ef10a355de8bb9b92efdc.tar.bz2 |
target/ppc: Factor out 4xx ppcemb_tlb_t flushing
Flushing the TCG TLB pages that cache a software TLB is a common
operation, factor it into its own function.
Tested-by: BALATON Zoltan <balaton@eik.bme.hu>
Acked-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
-rw-r--r-- | target/ppc/mmu_helper.c | 24 |
1 files changed, 13 insertions, 11 deletions
diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index c140f3c..949ae87 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -749,12 +749,20 @@ target_ulong helper_4xx_tlbre_lo(CPUPPCState *env, target_ulong entry) return ret; } +static void ppcemb_tlb_flush(CPUState *cs, ppcemb_tlb_t *tlb) +{ + target_ulong ea; + + for (ea = tlb->EPN; ea < tlb->EPN + tlb->size; ea += TARGET_PAGE_SIZE) { + tlb_flush_page(cs, ea); + } +} + void helper_4xx_tlbwe_hi(CPUPPCState *env, target_ulong entry, target_ulong val) { CPUState *cs = env_cpu(env); ppcemb_tlb_t *tlb; - target_ulong page, end; qemu_log_mask(CPU_LOG_MMU, "%s entry %d val " TARGET_FMT_lx "\n", __func__, (int)entry, @@ -763,13 +771,10 @@ void helper_4xx_tlbwe_hi(CPUPPCState *env, target_ulong entry, tlb = &env->tlb.tlbe[entry]; /* Invalidate previous TLB (if it's valid) */ if (tlb->prot & PAGE_VALID) { - end = tlb->EPN + tlb->size; qemu_log_mask(CPU_LOG_MMU, "%s: invalidate old TLB %d start " TARGET_FMT_lx " end " TARGET_FMT_lx "\n", __func__, - (int)entry, tlb->EPN, end); - for (page = tlb->EPN; page < end; page += TARGET_PAGE_SIZE) { - tlb_flush_page(cs, page); - } + (int)entry, tlb->EPN, tlb->EPN + tlb->size); + ppcemb_tlb_flush(cs, tlb); } tlb->size = booke_tlb_to_page_size((val >> PPC4XX_TLBHI_SIZE_SHIFT) & PPC4XX_TLBHI_SIZE_MASK); @@ -805,13 +810,10 @@ void helper_4xx_tlbwe_hi(CPUPPCState *env, target_ulong entry, tlb->prot & PAGE_VALID ? 'v' : '-', (int)tlb->PID); /* Invalidate new TLB (if valid) */ if (tlb->prot & PAGE_VALID) { - end = tlb->EPN + tlb->size; qemu_log_mask(CPU_LOG_MMU, "%s: invalidate TLB %d start " TARGET_FMT_lx " end " TARGET_FMT_lx "\n", __func__, - (int)entry, tlb->EPN, end); - for (page = tlb->EPN; page < end; page += TARGET_PAGE_SIZE) { - tlb_flush_page(cs, page); - } + (int)entry, tlb->EPN, tlb->EPN + tlb->size); + ppcemb_tlb_flush(cs, tlb); } } |