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authorPhilippe Mathieu-Daudé <philmd@redhat.com>2021-08-26 20:07:03 +0200
committerPeter Maydell <peter.maydell@linaro.org>2021-09-01 11:08:15 +0100
commitc0bb7d611403ba0fff050a6a065e76ab54d7ab77 (patch)
tree39e5a896368bc496abc8f0eac41c35d1624d929c
parent57469ed384b1f83788f0f1995af673b735f4f790 (diff)
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hw/intc/arm_gicv3_dist: Rename 64-bit accessors with 'q' suffix
QEMU load/store API (docs/devel/loads-stores.rst) uses the 'q' suffix for 64-bit accesses. Rename the current 'll' suffix to have the GIC dist accessors better match the rest of the codebase. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20210826180704.2131949-2-philmd@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--hw/intc/arm_gicv3_dist.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/hw/intc/arm_gicv3_dist.c b/hw/intc/arm_gicv3_dist.c
index b65f56f..7e9b393 100644
--- a/hw/intc/arm_gicv3_dist.c
+++ b/hw/intc/arm_gicv3_dist.c
@@ -763,8 +763,8 @@ static MemTxResult gicd_writel(GICv3State *s, hwaddr offset,
}
}
-static MemTxResult gicd_writell(GICv3State *s, hwaddr offset,
- uint64_t value, MemTxAttrs attrs)
+static MemTxResult gicd_writeq(GICv3State *s, hwaddr offset,
+ uint64_t value, MemTxAttrs attrs)
{
/* Our only 64-bit registers are GICD_IROUTER<n> */
int irq;
@@ -779,8 +779,8 @@ static MemTxResult gicd_writell(GICv3State *s, hwaddr offset,
}
}
-static MemTxResult gicd_readll(GICv3State *s, hwaddr offset,
- uint64_t *data, MemTxAttrs attrs)
+static MemTxResult gicd_readq(GICv3State *s, hwaddr offset,
+ uint64_t *data, MemTxAttrs attrs)
{
/* Our only 64-bit registers are GICD_IROUTER<n> */
int irq;
@@ -812,7 +812,7 @@ MemTxResult gicv3_dist_read(void *opaque, hwaddr offset, uint64_t *data,
r = gicd_readl(s, offset, data, attrs);
break;
case 8:
- r = gicd_readll(s, offset, data, attrs);
+ r = gicd_readq(s, offset, data, attrs);
break;
default:
r = MEMTX_ERROR;
@@ -854,7 +854,7 @@ MemTxResult gicv3_dist_write(void *opaque, hwaddr offset, uint64_t data,
r = gicd_writel(s, offset, data, attrs);
break;
case 8:
- r = gicd_writell(s, offset, data, attrs);
+ r = gicd_writeq(s, offset, data, attrs);
break;
default:
r = MEMTX_ERROR;