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authorBibo Mao <maobibo@loongson.cn>2023-12-06 16:18:39 +0800
committerSong Gao <gaosong@loongson.cn>2023-12-21 16:07:47 +0800
commitbe45144bee708d3b84c3c474a4d4aeb7e5c4733a (patch)
tree327c4dbcd0e9f9c4000f42ace1cce3a5fc144379
parent578616299661e4a0bd723b35dc9489abb8077f08 (diff)
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target/loongarch: Add timer information dump support
Timer emulation sometimes is problematic especially when vm is running in kvm mode. This patch adds registers dump support relative with timer hardware, so that it is easier to find the problems. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20231206081839.2290178-1-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
-rw-r--r--target/loongarch/cpu.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index b26187d..07319d6 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -764,6 +764,8 @@ void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int flags)
qemu_fprintf(f, "TLBRENTRY=%016" PRIx64 "\n", env->CSR_TLBRENTRY);
qemu_fprintf(f, "TLBRBADV=%016" PRIx64 "\n", env->CSR_TLBRBADV);
qemu_fprintf(f, "TLBRERA=%016" PRIx64 "\n", env->CSR_TLBRERA);
+ qemu_fprintf(f, "TCFG=%016" PRIx64 "\n", env->CSR_TCFG);
+ qemu_fprintf(f, "TVAL=%016" PRIx64 "\n", env->CSR_TVAL);
/* fpr */
if (flags & CPU_DUMP_FPU) {