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| author | Richard Henderson <richard.henderson@linaro.org> | 2025-02-01 16:40:11 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2025-02-11 16:22:08 +0000 |
| commit | bbeed9f06a4e66d444bcde9ef4bdd21e866b7d77 (patch) | |
| tree | 017b079e168226a7acf0737a371e59900e9934b3 | |
| parent | d75f68047624e5337963690a9a96906fcca3aefe (diff) | |
| download | qemu-bbeed9f06a4e66d444bcde9ef4bdd21e866b7d77.zip qemu-bbeed9f06a4e66d444bcde9ef4bdd21e866b7d77.tar.gz qemu-bbeed9f06a4e66d444bcde9ef4bdd21e866b7d77.tar.bz2 | |
target/arm: Read fz16 from env->vfp.fpcr
Read the bit from the source, rather than from the proxy via
get_flush_inputs_to_zero. This makes it clear that it does
not matter which of the float_status structures is used.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250129013857.135256-34-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target/arm/tcg/vec_helper.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/target/arm/tcg/vec_helper.c b/target/arm/tcg/vec_helper.c index 2da44ae..cc3586f 100644 --- a/target/arm/tcg/vec_helper.c +++ b/target/arm/tcg/vec_helper.c @@ -2155,7 +2155,7 @@ void HELPER(gvec_fmlal_a32)(void *vd, void *vn, void *vm, uint64_t negx = is_s ? 0x8000800080008000ull : 0; do_fmlal(vd, vn, vm, &env->vfp.fp_status[FPST_STD], negx, 0, desc, - get_flush_inputs_to_zero(&env->vfp.fp_status[FPST_A32_F16])); + env->vfp.fpcr & FPCR_FZ16); } void HELPER(gvec_fmlal_a64)(void *vd, void *vn, void *vm, @@ -2173,7 +2173,7 @@ void HELPER(gvec_fmlal_a64)(void *vd, void *vn, void *vm, } } do_fmlal(vd, vn, vm, &env->vfp.fp_status[FPST_A64], negx, negf, desc, - get_flush_inputs_to_zero(&env->vfp.fp_status[FPST_A64_F16])); + env->vfp.fpcr & FPCR_FZ16); } void HELPER(sve2_fmlal_zzzw_s)(void *vd, void *vn, void *vm, void *va, @@ -2183,7 +2183,7 @@ void HELPER(sve2_fmlal_zzzw_s)(void *vd, void *vn, void *vm, void *va, bool is_s = extract32(desc, SIMD_DATA_SHIFT, 1); intptr_t sel = extract32(desc, SIMD_DATA_SHIFT + 1, 1) * sizeof(float16); float_status *status = &env->vfp.fp_status[FPST_A64]; - bool fz16 = get_flush_inputs_to_zero(&env->vfp.fp_status[FPST_A64_F16]); + bool fz16 = env->vfp.fpcr & FPCR_FZ16; int negx = 0, negf = 0; if (is_s) { @@ -2236,7 +2236,7 @@ void HELPER(gvec_fmlal_idx_a32)(void *vd, void *vn, void *vm, uint64_t negx = is_s ? 0x8000800080008000ull : 0; do_fmlal_idx(vd, vn, vm, &env->vfp.fp_status[FPST_STD], negx, 0, desc, - get_flush_inputs_to_zero(&env->vfp.fp_status[FPST_A32_F16])); + env->vfp.fpcr & FPCR_FZ16); } void HELPER(gvec_fmlal_idx_a64)(void *vd, void *vn, void *vm, @@ -2254,7 +2254,7 @@ void HELPER(gvec_fmlal_idx_a64)(void *vd, void *vn, void *vm, } } do_fmlal_idx(vd, vn, vm, &env->vfp.fp_status[FPST_A64], negx, negf, desc, - get_flush_inputs_to_zero(&env->vfp.fp_status[FPST_A64_F16])); + env->vfp.fpcr & FPCR_FZ16); } void HELPER(sve2_fmlal_zzxw_s)(void *vd, void *vn, void *vm, void *va, @@ -2265,7 +2265,7 @@ void HELPER(sve2_fmlal_zzxw_s)(void *vd, void *vn, void *vm, void *va, intptr_t sel = extract32(desc, SIMD_DATA_SHIFT + 1, 1) * sizeof(float16); intptr_t idx = extract32(desc, SIMD_DATA_SHIFT + 2, 3) * sizeof(float16); float_status *status = &env->vfp.fp_status[FPST_A64]; - bool fz16 = get_flush_inputs_to_zero(&env->vfp.fp_status[FPST_A64_F16]); + bool fz16 = env->vfp.fpcr & FPCR_FZ16; int negx = 0, negf = 0; if (is_s) { |