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| author | Song Gao <gaosong@loongson.cn> | 2023-09-14 10:26:00 +0800 |
|---|---|---|
| committer | Song Gao <gaosong@loongson.cn> | 2023-09-20 11:43:11 +0800 |
| commit | b8f1bdf3d1f5ed8e048e5982e3df8297e97b98ff (patch) | |
| tree | 97465240962f4e2efab8c1a82f880fb0484374ce | |
| parent | 008a3b1662b60fd9e348b8ffb14f05e03c79a2b3 (diff) | |
| download | qemu-b8f1bdf3d1f5ed8e048e5982e3df8297e97b98ff.zip qemu-b8f1bdf3d1f5ed8e048e5982e3df8297e97b98ff.tar.gz qemu-b8f1bdf3d1f5ed8e048e5982e3df8297e97b98ff.tar.bz2 | |
target/loongarch: check_vec support check LASX instructions
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230914022645.1151356-13-gaosong@loongson.cn>
| -rw-r--r-- | target/loongarch/cpu.c | 2 | ||||
| -rw-r--r-- | target/loongarch/cpu.h | 2 | ||||
| -rw-r--r-- | target/loongarch/insn_trans/trans_vec.c.inc | 6 |
3 files changed, 10 insertions, 0 deletions
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 4d72e90..a1d3f68 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -55,6 +55,7 @@ static const char * const excp_names[] = { [EXCCODE_DBP] = "Debug breakpoint", [EXCCODE_BCE] = "Bound Check Exception", [EXCCODE_SXD] = "128 bit vector instructions Disable exception", + [EXCCODE_ASXD] = "256 bit vector instructions Disable exception", }; const char *loongarch_exception_name(int32_t exception) @@ -190,6 +191,7 @@ static void loongarch_cpu_do_interrupt(CPUState *cs) case EXCCODE_FPD: case EXCCODE_FPE: case EXCCODE_SXD: + case EXCCODE_ASXD: env->CSR_BADV = env->pc; QEMU_FALLTHROUGH; case EXCCODE_BCE: diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index 347ad1c..f125a8e 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -462,6 +462,7 @@ static inline void set_pc(CPULoongArchState *env, uint64_t value) #define HW_FLAGS_CRMD_PG R_CSR_CRMD_PG_MASK /* 0x10 */ #define HW_FLAGS_EUEN_FPE 0x04 #define HW_FLAGS_EUEN_SXE 0x08 +#define HW_FLAGS_EUEN_ASXE 0x10 #define HW_FLAGS_VA32 0x20 static inline void cpu_get_tb_cpu_state(CPULoongArchState *env, vaddr *pc, @@ -472,6 +473,7 @@ static inline void cpu_get_tb_cpu_state(CPULoongArchState *env, vaddr *pc, *flags = env->CSR_CRMD & (R_CSR_CRMD_PLV_MASK | R_CSR_CRMD_PG_MASK); *flags |= FIELD_EX64(env->CSR_EUEN, CSR_EUEN, FPE) * HW_FLAGS_EUEN_FPE; *flags |= FIELD_EX64(env->CSR_EUEN, CSR_EUEN, SXE) * HW_FLAGS_EUEN_SXE; + *flags |= FIELD_EX64(env->CSR_EUEN, CSR_EUEN, ASXE) * HW_FLAGS_EUEN_ASXE; *flags |= is_va32(env) * HW_FLAGS_VA32; } diff --git a/target/loongarch/insn_trans/trans_vec.c.inc b/target/loongarch/insn_trans/trans_vec.c.inc index d8ab7c3..b5ca65c 100644 --- a/target/loongarch/insn_trans/trans_vec.c.inc +++ b/target/loongarch/insn_trans/trans_vec.c.inc @@ -12,6 +12,12 @@ static bool check_vec(DisasContext *ctx, uint32_t oprsz) generate_exception(ctx, EXCCODE_SXD); return false; } + + if ((oprsz == 32) && ((ctx->base.tb->flags & HW_FLAGS_EUEN_ASXE) == 0)) { + generate_exception(ctx, EXCCODE_ASXD); + return false; + } + return true; } |