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author | Richard Henderson <richard.henderson@linaro.org> | 2021-01-29 10:00:42 -1000 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2021-06-19 08:51:11 -0700 |
commit | b6139eb0578fc422cfee77fccbd11152e73af1df (patch) | |
tree | 76a79f088a98d48b49598e0c6a7c69fad7d66211 | |
parent | 22f15579fa1ca654d331cac8e68a4e70981a8801 (diff) | |
download | qemu-b6139eb0578fc422cfee77fccbd11152e73af1df.zip qemu-b6139eb0578fc422cfee77fccbd11152e73af1df.tar.gz qemu-b6139eb0578fc422cfee77fccbd11152e73af1df.tar.bz2 |
tcg/tci: Improve tcg_target_call_clobber_regs
The current setting is much too pessimistic. Indicating only
the one or two registers that are actually assigned after a
call should avoid unnecessary movement between the register
array and the stack array.
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
-rw-r--r-- | tcg/tci/tcg-target.c.inc | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 823ecd5..8f3f9ef 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -810,8 +810,14 @@ static void tcg_target_init(TCGContext *s) tcg_target_available_regs[TCG_TYPE_I32] = BIT(TCG_TARGET_NB_REGS) - 1; /* Registers available for 64 bit operations. */ tcg_target_available_regs[TCG_TYPE_I64] = BIT(TCG_TARGET_NB_REGS) - 1; - /* TODO: Which registers should be set here? */ - tcg_target_call_clobber_regs = BIT(TCG_TARGET_NB_REGS) - 1; + /* + * The interpreter "registers" are in the local stack frame and + * cannot be clobbered by the called helper functions. However, + * the interpreter assumes a 64-bit return value and assigns to + * the return value registers. + */ + tcg_target_call_clobber_regs = + MAKE_64BIT_MASK(TCG_REG_R0, 64 / TCG_TARGET_REG_BITS); s->reserved_regs = 0; tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK); |