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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-10-26 20:46:13 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-11-06 18:49:34 -0800 |
| commit | b5caa17cdaf153fca500cf8bb0fa3a14c02def6e (patch) | |
| tree | 7a093372f950c207eb3eeb80ee8e836a15500921 | |
| parent | 54111124fb9097635ec784131ceec26798e2ba77 (diff) | |
| download | qemu-b5caa17cdaf153fca500cf8bb0fa3a14c02def6e.zip qemu-b5caa17cdaf153fca500cf8bb0fa3a14c02def6e.tar.gz qemu-b5caa17cdaf153fca500cf8bb0fa3a14c02def6e.tar.bz2 | |
target/hppa: Implement pa2.0 data prefetch instructions
These are aliased onto the normal integer loads to %g0.
Since we don't emulate caches, prefetch is a nop.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | target/hppa/translate.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/target/hppa/translate.c b/target/hppa/translate.c index ba15cf6..e7f379d 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -2976,7 +2976,15 @@ static bool trans_permh(DisasContext *ctx, arg_permh *a) static bool trans_ld(DisasContext *ctx, arg_ldst *a) { - if (!ctx->is_pa20 && a->size > MO_32) { + if (ctx->is_pa20) { + /* + * With pa20, LDB, LDH, LDW, LDD to %g0 are prefetches. + * Any base modification still occurs. + */ + if (a->t == 0) { + return trans_nop_addrx(ctx, a); + } + } else if (a->size > MO_32) { return gen_illegal(ctx); } return do_load(ctx, a->t, a->b, a->x, a->scale ? a->size : 0, |