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| author | Paolo Bonzini <pbonzini@redhat.com> | 2015-06-18 18:28:41 +0200 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2015-07-06 17:59:01 +0200 |
| commit | afd6895b45f20eb43b7ff95f7a76cc5af8d36cd7 (patch) | |
| tree | 4471fa5c389b72d89ed603dce91747aca58869e1 | |
| parent | 25b8b39b6d7de95d0dd5ae7b66b3ac4b9b83e060 (diff) | |
| download | qemu-afd6895b45f20eb43b7ff95f7a76cc5af8d36cd7.zip qemu-afd6895b45f20eb43b7ff95f7a76cc5af8d36cd7.tar.gz qemu-afd6895b45f20eb43b7ff95f7a76cc5af8d36cd7.tar.bz2 | |
piix4/ich9: do not raise SMI on ACPI enable/disable commands
These commands are handled entirely by QEMU. Do not raise an SMI
when they happen, because Windows (at least 2008r2) expects these
commands to work and (depending on the value of APMC_EN at
startup) the firmware might not have installed an SMI handler.
When this happens (e.g. the kernel supports SMIs, or you are using
TCG, but you have used "-machine smm=off") RIP is moved to 0x38000
where there is no code to execute.
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| -rw-r--r-- | hw/acpi/piix4.c | 3 | ||||
| -rw-r--r-- | hw/isa/lpc_ich9.c | 3 |
2 files changed, 6 insertions, 0 deletions
diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index 3bd1d5a..3af0fa7 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -112,6 +112,9 @@ static void apm_ctrl_changed(uint32_t val, void *arg) /* ACPI specs 3.0, 4.7.2.5 */ acpi_pm1_cnt_update(&s->ar, val == ACPI_ENABLE, val == ACPI_DISABLE); + if (val == ACPI_ENABLE || val == ACPI_DISABLE) { + return; + } if (d->config[0x5b] & (1 << 1)) { if (s->smi_irq) { diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c index b3e0b1f..341a727 100644 --- a/hw/isa/lpc_ich9.c +++ b/hw/isa/lpc_ich9.c @@ -375,6 +375,9 @@ static void ich9_apm_ctrl_changed(uint32_t val, void *arg) acpi_pm1_cnt_update(&lpc->pm.acpi_regs, val == ICH9_APM_ACPI_ENABLE, val == ICH9_APM_ACPI_DISABLE); + if (val == ICH9_APM_ACPI_ENABLE || val == ICH9_APM_ACPI_DISABLE) { + return; + } /* SMI_EN = PMBASE + 30. SMI control and enable register */ if (lpc->pm.smi_en & ICH9_PMIO_SMI_EN_APMC_EN) { |