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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-09-01 16:41:00 +0200 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-09-14 14:23:19 +0100 |
| commit | ae689ad7a89eff2e6222bbe30710a30cc7625538 (patch) | |
| tree | 3892f58baf21e3c2bdfe0f7bf584a91c6a14d40c | |
| parent | 9d8e61918f2ecb67885d90ea5c6ad8e3d73e7db4 (diff) | |
| download | qemu-ae689ad7a89eff2e6222bbe30710a30cc7625538.zip qemu-ae689ad7a89eff2e6222bbe30710a30cc7625538.tar.gz qemu-ae689ad7a89eff2e6222bbe30710a30cc7625538.tar.bz2 | |
hw/misc/a9scu: Report unimplemented accesses with qemu_log_mask(UNIMP)
Report unimplemented register accesses using qemu_log_mask(UNIMP).
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200901144100.116742-5-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | hw/misc/a9scu.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/hw/misc/a9scu.c b/hw/misc/a9scu.c index 47f9483..a375ebc 100644 --- a/hw/misc/a9scu.c +++ b/hw/misc/a9scu.c @@ -13,6 +13,7 @@ #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "qapi/error.h" +#include "qemu/log.h" #include "qemu/module.h" #define A9_SCU_CPU_MAX 4 @@ -38,6 +39,8 @@ static uint64_t a9_scu_read(void *opaque, hwaddr offset, case 0x54: /* SCU Non-secure Access Control Register */ /* unimplemented, fall through */ default: + qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx"\n", + __func__, offset); return 0; } } @@ -67,6 +70,9 @@ static void a9_scu_write(void *opaque, hwaddr offset, case 0x54: /* SCU Non-secure Access Control Register */ /* unimplemented, fall through */ default: + qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx + " value 0x%"PRIx64"\n", + __func__, offset, value); break; } } |